🤖 AI Summary
Deploying deep neural networks on resource-constrained embedded systems presents significant challenges in simultaneously achieving energy efficiency, correctness, and security—particularly in safety-critical domains such as healthcare, where models are vulnerable to fault injection attacks and lack dynamic accuracy guarantees. To address this, this work proposes a hardware-software co-design approach. On the software side, it introduces the first adaptive precision quantization method that jointly ensures real-time operation, dynamic adjustability, and formal correctness, leveraging sensitivity analysis to stabilize decision boundaries. On the hardware side, it designs a customized systolic array supporting left-to-right, most-significant-bit (MSB)-first computation to enhance resilience against bit-flip errors. Experimental results demonstrate the feasibility of the proposed framework, with preliminary findings indicating substantial improvements in both reliability and resource efficiency for edge AI deployments.
📝 Abstract
Complex algorithms such as deep neural networks are increasingly being deployed on embedded, resource constrained platforms. However, existing hardware and software schemes for implementing these models on the edge fall short, particularly for safety-critical applications such as medical devices. First, hardware such as GPUs, NPUs and TPUs are designed for throughput rather than correctness of computation of security, and are as such susceptible to fault injection attacks. Second, software schemes designed for porting algorithms onto edge devices -- such as quantization schemes -- are either static and sound (non-optimal power consumption), or dynamic yet unsound (non-optimal for safety-critical applications). To address both these needs we propose a both wholly new approach to real-time, dynamic and sound quantization, as well as the hardware to support it. First we developed a sound, real-time adaptive-precision quantization approach utilizing left-to-right arithmetic to pass the most significant bits (MSB) first, and dynamically adjust precision online while performing sensitivity analysis to quantify and manage the risk of decision-boundary crossings. Next, we propose a novel hardware approach utilizing systolic arrays to perform left-to-right arithmetic to generate the MSB first. Together this provides a wholly novel scheme for enabling not only resource-efficient neural networks and artificial intelligence at the edge, but broadly sound and resource-efficient high-precision mathematics on hardware that ensures resilience to bit flip attacks on the most critical bits. This is presented herein as work-in-progress, with software implementations completed and hardware in-progress.