🤖 AI Summary
To address the explosive sampling overhead induced by collaborative subcircuit execution in large-scale quantum circuit simulation on NISQ-era hardware, this paper proposes ShotQC—a framework enabling distributed subcircuit execution and intelligent post-processing without increasing classical computational complexity. Its core contributions are threefold: (1) the first joint optimization of shot distribution adaptation and circuit-cutting parameterization, achieving subexponential—rather than exponential—scaling of sampling cost with respect to the number of cuts; (2) variance-aware subcircuit resource scheduling; (3) degrees-of-freedom-controllable parametric post-processing integrated with quantum-classical co-optimization. Evaluated on diverse benchmark circuits, ShotQC reduces sampling overhead by up to 92% while maintaining linear scaling of classical post-processing time, demonstrating high efficiency and scalability for real quantum hardware.
📝 Abstract
The recent quantum circuit cutting technique enables simulating large quantum circuits on distributed smaller devices, significantly extending the capabilities of current noisy intermediate-scale quantum (NISQ) hardware. However, this method incurs substantial classical postprocessing and additional quantum resource demands, as both postprocessing complexity and sampling overhead scale exponentially with the number of cuts introduced. In this work, we propose an enhanced circuit cutting framework ShotQC with effective sampling overhead reduction. It effectively reduces sampling overhead through two key optimizations: shot distribution and cut parameterization. The former employs an adaptive Monte Carlo method to dynamically allocate more quantum resources to subcircuit configurations that contribute more to variance in the final outcome. The latter leverages additional degrees of freedom in postprocessing to further suppress variance. By integrating these optimization methods, ShotQC achieves significant reductions in sampling overhead without increasing classical postprocessing complexity, as demonstrated on a range of benchmark circuits.