🤖 AI Summary
Tree models deployed on content-addressable memory (CAM) hardware suffer from low energy efficiency due to the lack of circuit-level exploitation of their structural properties.
Method: This paper proposes a structure-aware hardware-software co-optimization framework that jointly exploits monotonicity and sparsity inherent in tree models. It enables decision-path pruning, monotonic feature grouping, and sparse rule encoding within CAM, establishing both compression and skip mechanisms. Crucially, the design explicitly maps tree model structure onto circuit-level CAM architecture to maximize hardware resource utilization.
Results: Experiments demonstrate a 28.56× energy reduction over baseline CPU execution and an 18.51× improvement over the state-of-the-art CAM accelerator, alongside ≥1.68× higher throughput. This work establishes a new paradigm for energy-efficient hardware deployment of interpretable machine learning models.
📝 Abstract
While the tree-based machine learning (TBML) models exhibit superior performance compared to neural networks on tabular data and hold promise for energy-efficient acceleration using aCAM arrays, their ideal deployment on hardware with explicit exploitation of TBML structure and aCAM circuitry remains a challenging task. In this work, we present MonoSparse-CAM, a new CAM-based optimization technique that exploits TBML sparsity and monotonicity in CAM circuitry to further advance processing performance. Our results indicate that MonoSparse-CAM reduces energy consumption by upto to 28.56x compared to raw processing and by 18.51x compared to state-of-the-art techniques, while improving the efficiency of computation by at least 1.68x.