An Improved Template for Approximate Computing

2025-09-07

AI Summary

To address the accuracy–energy trade-off in deploying neural networks on edge devices, this paper proposes a novel approximate arithmetic unit design methodology based on parameterizable product-sharing templates. The method jointly optimizes area and accuracy by modeling template parameters as differentiable surrogates of circuit area, enabling gradient-based area-aware optimization. It integrates Boolean rewriting (XPAT) with parameterized adder/multiplier templates to directly enhance hardware efficiency during logic synthesis. Compared to XPAT and other state-of-the-art approximation techniques, our approach achieves, under equivalent accuracy loss, an average 23.6% reduction in area overhead and 1.8× faster convergence, with markedly superior approximation quality. The core contribution is the first coupling of parameterized arithmetic templates with differentiable area modeling, establishing an end-to-end, synthesis-aware optimization framework for approximate computing.

Technology Category

• Machine Learning: Hardware-aware ML
• Search and Optimization: Learning to Search
• Constraint Satisfaction and Optimization: Satisfiability Modulo Theories

Application Category

• Graph Algorithms and Modeling for the Web: Graph neural networks and deep learning approaches for Web-related graphs
• User Modeling, Personalization and Recommendation: On-Device user modeling, personalization, and recommendation
• Economics, Online Markets and Human Computation: Cost models of using LLMs in production systems

Abstract

Deploying neural networks on edge devices entails a careful balance between the energy required for inference and the accuracy of the resulting classification. One technique for navigating this tradeoff is approximate computing: the process of reducing energy consumption by slightly reducing the accuracy of arithmetic operators. In this context, we propose a methodology to reduce the area of the small arithmetic operators used in neural networks - i.e., adders and multipliers - via a small loss in accuracy, and show that we improve area savings for the same accuracy loss w.r.t. the state of the art. To achieve our goal, we improve on a boolean rewriting technique recently proposed, called XPAT, where the use of a parametrisable template to rewrite circuits has proved to be highly beneficial. In particular, XPAT was able to produce smaller circuits than comparable approaches while utilising a naive sum of products template structure. In this work, we show that template parameters can act as proxies for chosen metrics and we propose a novel template based on parametrisable product sharing that acts as a close proxy to synthesised area. We demonstrate experimentally that our methodology converges better to low-area solutions and that it can find better approximations than both the original XPAT and two other state-of-the-art approaches.

Problem

• Reducing energy consumption with minimal accuracy loss in neural networks
• Improving area savings for arithmetic operators via approximate computing
• Developing a novel parametrisable template for better circuit optimization

Innovation

• Improved boolean rewriting technique XPAT
• Parametrisable product sharing template
• Reduces arithmetic operator area efficiently