🤖 AI Summary
This work addresses the intricate trade-offs among returns, risk, transaction costs, and constraints in multi-period dynamic portfolio optimization by proposing a sampling-based variational quantum algorithm tailored for near-term quantum hardware. The core innovations include an adaptive CVaR (Conditional Value-at-Risk) sampling schedule, a two-stage hybrid optimization strategy combining particle swarm optimization with the Nakanishi-Fujii-Todo optimizer, and two hardware-aware ansatz layouts: a data-guided coloring layout and a heavy-hexagon-native deep-chain layout. Experimental results on the 150-qubit ibm_quebec processor demonstrate that the heavy-hexagon-native deep-chain layout achieves superior performance in both objective value and CVaR tail metrics, establishing an effective paradigm for implementing variational algorithms on noisy intermediate-scale quantum devices.
📝 Abstract
Variational quantum algorithms are increasingly explored for optimization problems at scales relevant to near-term quantum devices. Their practical performance depends strongly on design choices such as the sampling objective, classical optimizer, and ansatz layout before and after hardware transpilation. We study these factors for dynamic portfolio optimization, a multi-period financial problem balancing return, risk, transaction costs, cash-interest effects, and constraints. Using a sampling-based VQA framework on a 150-qubit dynamic portfolio instance, we evaluate several components of the optimization workflow. We propose a specific adaptive CVaR schedule that gradually tightens the sampled tail used for optimization, together with a two-stage optimizer combining global exploration with Particle Swarm Optimization and local refinement with the Nakanishi-Fujii-Todo optimizer. We also study ansatz depth and sequential growth strategies. Finally, we introduce two hardware-aware ansatz-layout modifications: a data-guided colored layout that assigns correlated variables to qubits connected by entangling gates, and a heavy-hex-native deep-chain layout designed to increase native two-qubit interaction depth without additional routing overhead after transpilation. Simulator studies select CVaR, optimizer, and depth configurations, while the ansatz comparison is performed on the ibm_quebec QPU. The results show that sampling strategy, optimizer scheduling, and hardware-aware layout design materially affect performance. In the reported QPU layout comparison, the proposed heavy-hex-native deep-chain layout achieves the best final objective value and CVaR-tail performance among the tested layouts. Although we do not observe quantum advantage over a state-of-the-art exact classical solver, our results provide practical guidance for improving VQA performance on near-term hardware.