Fault Tolerant Design of IGZO-based Binary Search ADCs

2026-02-11

AI Summary

This work addresses the vulnerability of analog-to-digital converters (ADCs) implemented in unipolar thin-film technologies such as IGZO to process-induced defects, which severely limits their fault tolerance. To overcome this challenge, the authors propose a hierarchical fault injection framework that integrates transistor-level defect modeling with system-level fault propagation analysis. This approach enables precise identification of the most sensitive modules within a binary-search ADC, facilitating targeted selective redundancy for hardening. The methodology represents the first efficient fault-tolerant design tailored specifically for ADCs in emerging unipolar technologies. Experimental results demonstrate that, with only a 4.2% area and 6% power overhead, the proposed technique significantly improves single-fault coverage from 60% to 92% and multi-fault coverage from 34% to 77.6%.

Technology Category

• Machine Learning: Adversarial Learning & Robustness
• Computer Vision: Adversarial Attacks & Robustness
• Search and Optimization: Adversarial Search

Application Category

• Security and Privacy: Large-scale security measurements
• Systems and Infrastructure for Web, Mobile and WoT: Federated Web and WoT systems, including distributed, federated and edge-based data processing
• Responsible Web: Data and user privacy-enhancing technologies for the Web

Abstract

Thin-film technologies such as Indium Gallium Zinc Oxide (IGZO) enable Flexible Electronics (FE) for emerging applications in wearable sensing, personal health monitoring, and large-area systems. Analog-to-digital converters (ADCs) serve as critical sensor interfaces in these systems. Yet, their vulnerability to manufacturing defects remains poorly understood despite unipolar technologies'inherently high defect densities and process variations compared to mature CMOS technologies. We present a hierarchical fault injection framework to characterize defect sensitivity in Binary Search ADCs implemented in n-type only technologies. Our methodology combines transistor-level defect characterization with system-level fault propagation analysis, enabling efficient exploration of both single and multiple fault scenarios across the conversion hierarchy. The framework identifies critical fault-sensitive circuit components and enables selective redundancy strategies targeting only the most sensitive components. The resulting defect-tolerant designs improve fault coverage from 60% to 92% under single-fault injections and from 34% to 77.6% under multi-fault injection, while incurring only 4.2% area overhead and 6% power increase. While validated on IGZO-TFTs, the methodology applies to all emerging unipolar technologies.

Problem

• Fault Tolerance
• IGZO
• Binary Search ADC
• Manufacturing Defects
• Flexible Electronics

Innovation

• fault-tolerant design
• IGZO-TFT
• binary search ADC
• hierarchical fault injection
• selective redundancy