Checking Timed Bisimilarity with Virtual Clocks

2024-12-20

AI Summary

Existing timed bisimulation verification methods rely on region graphs, suffering from state-space explosion, insufficient precision, and lack of automated tool support—hindering effective decidability of timed bisimilarity between timed automata. This paper introduces the virtual-clock extended zone graph representation, enabling, for the first time, precise timed bisimilarity checking based on zone graphs. We design an enhanced zone graph construction procedure, a symbolic semantic model, and an efficient timed bisimulation algorithm, collectively achieving significant state-space reduction. Based on this framework, we develop the first practical, fully automated verification tool. Experimental evaluation on standard benchmarks confirms its correctness and efficiency: the resulting zone graphs are, on average, substantially smaller than conventional region graphs, and the tool overcomes the limitation of existing tools—which only support reachability analysis and cannot verify bisimilarity.

Technology Category

• Knowledge Representation and Reasoning: Automated Reasoning and Theorem Proving
• Constraint Satisfaction and Optimization: Satisfiability Modulo Theories
• Planning, Routing, and Scheduling: Temporal Planning

Application Category

• Graph Algorithms and Modeling for the Web: Efficient manipulation of static and dynamic Web-related graphs
• Systems and Infrastructure for Web, Mobile and WoT: Virtualization and resource management in Web systems and infrastructures
• Security and Privacy: Large-scale security measurements

Abstract

Timed automata are a widely used formalism for specifying the discrete-state/continu-ous-time behavior of time-critical reactive systems. For the fundamental verification problem of comparing two timed automata, it has been shown that timed trace equivalence is undecidable, while timed bisimulation is decidable. The corresponding decidability proof uses region graphs, a finite but space-consuming characterization of timed automata semantics. Most verification tools use zone graphs instead, a symbolic and, on average, more space-efficient representation of timed automata semantics. However, zone graphs provide correct results only for those verification tasks that are reducible to reachability problems, and are too imprecise for timed bisimilarity checking. To the best of our knowledge, there is currently no practical tool for automated timed bisimilarity checking. In this paper, we propose a new representation of timed automata semantics that extends zone graphs by so-called virtual clocks. Our zone-based construction is, on average, significantly smaller than the corresponding region graph representation. We also present experimental results obtained by applying our tool implementation to timed automata models, which are often used to evaluate timed automata analysis techniques.

Problem

• Timing Verification
• Dual Analog Simulation
• Time Synchronization

Innovation

• Region Graphs
• Virtual Clocks
• Temporal Bisimulation Verification