🤖 AI Summary
This work addresses the challenge of classically simulating large-scale quantum convolutional neural networks, whose exponential hardware requirements hinder practical deployment for image classification. To overcome this limitation, the authors propose a novel parallel quantum convolutional architecture that leverages hierarchical image tiling, parallelizable sub-image encoding, and a state-merging mechanism. By integrating layered quantum circuit partitioning, multi-process classical simulation, and dimensionality-reducing measurements, the approach significantly reduces classical simulation overhead while mitigating the barren plateau problem. Experimental results demonstrate that the proposed model enables efficient training of a 128-qubit network on classical hardware, achieving accuracy on a binary MNIST classification task comparable to—or even surpassing—that of non-tiled counterparts, thereby validating its expressive power and scalability.
📝 Abstract
This work presents a study of an implementation of a novel Quantum Convolutional Neural Network (QCNN) for binary classification of images from the Modified National Institute of Standards and Technology (MNIST) dataset. Using a novel architecture inspired by previous QCNN and classical convolutional neural network (CNN) implementations, we use a hierarchical partitioning approach to implement a QCNN circuit that can be approximated and simulated efficiently on a classical machine for a large problem. First, the original image is partitioned such that each process handles a smaller portion of the image, which is encoded into independent states. Then, these partitions merge and combine, resulting in states that contain information from both partitions while halving the number of processes. After repeating this until one process remains, we reduce the dimensionality of the state until a single qubit remains for measurement. Using this approach, we can use multiple processes in parallel to simulate a large QCNN program without the need for exponentially growing hardware requirements as the number of qubits increases. In our work, we use this scheme to train a 128-qubit model, which is impossible to run on any classical supercomputer without the novel architecture. We also explore the impact of this new model architecture on prediction accuracy by training it to perform binary classification on the MNIST dataset with a small number of qubits, and comparing it to a model without partitioning. Our initial findings show that partitioning images into smaller sub-images with this architecture does not degrade the model's performance and sometimes even improves it, likely because it reduces the Barren plateaus issue in the partitioning process.