🤖 AI Summary
This study addresses the computational and memory bottlenecks encountered when deploying Graph Convolutional Networks (GCNs) on edge devices by proposing an FPGA-oriented co-optimization framework integrating graph sparsification and approximate computing. Building upon DSpar sparsification and 8-bit quantization, the method incorporates approximate multipliers and elucidates how accumulation depth influences approximate arithmetic errors. Furthermore, it theoretically and empirically validates the complementarity between sparsification and approximate computing. Evaluations on the AMD Kria KV260 platform demonstrate that the proposed design achieves inference power consumption below 1 W. On the Amazon Photo dataset, it delivers a 9.88× speedup while maintaining 86.6% accuracy, thereby offering a viable solution for efficient, low-power GCN inference in resource-constrained scenarios.
📝 Abstract
Graph Convolutional Networks (GCNs) have emerged as a powerful framework for learning from graph-structured data, yet their deployment on resource-constrained edge platforms remains challenging due to the computational and memory demands of sparse graph aggregation. This work presents an FPGA-based GCN accelerator that combines DSpar graph sparsification, 8-bit quantization, and approximate multipliers on the AMD Kria KV260. Evaluated on Cora, LastFM Asia, and Amazon Photo, the design explores the interaction between sparsification and approximation across graphs with widely varying densities. Results show that the effectiveness of approximate arithmetic is governed by accumulation depth within GCN computations. Approximate multipliers are most effective when applied to sparse aggregation operations, while graph sparsification further improves their viability by reducing aggregation depth. The combined approach achieves up to 9.88$\times$ speedup while maintaining 86.6\% classification accuracy on Amazon Photo, and 1.52$\times$ speedup with 77.0\% accuracy on Cora, with total power consumption below 1 W. These results demonstrate that graph sparsification and approximate computing are complementary techniques whose co-optimization enables efficient low-power GCN inference on edge FPGA platforms.