🤖 AI Summary
This study addresses the challenge of replicating the diverse spiking dynamics of biological neurons in hardware by proposing a reconfigurable Izhikevich-inspired neuron based on the co-design of voltage-controlled magnetic tunnel junctions (V-MTJs) and CMOS circuits. The approach leverages a coupling mechanism between the tunable excitability of the V-MTJ energy landscape and CMOS recovery dynamics, successfully generating five representative spiking patterns in the GlobalFoundries 22nm FD-SOI process. Experimental results demonstrate that the proposed architecture achieves an ultra-low single-spike energy consumption of 145.44 fJ and reduces inference spiking activity by 88.6% while preserving classification accuracy. This work provides an efficient hardware paradigm for low-power brain-inspired computing.
📝 Abstract
Biological neurons exhibit diverse firing dynamics that enable adaptive and stimulus-dependent signalling, yet reproducing these dynamics in hardware has remained an enduring challenge. In this work, we present an Izhikevich- inspired reconfigurable neuron that co-designs voltage-controlled magnetic tunnel junction (V-MTJ) dynamics with CMOS circuitry. The proposed architecture combines V-MTJ excitability dynamics, enabled by a tunable energy landscape, with CMOS recovery dynamics to generate five distinct neuronal firing pat- terns with different spiking, bursting and response characteristics. Our results, based on measured V-MTJ characteristics and circuit simulations using com- mercial GlobalFoundries 22-nm FD-SOI CMOS technology, show an average energy consumption of 145.44 fJ per spike. Algorithmic simulations further show that these firing dynamics reduce inference spike activity by up to 88.6% while maintaining baseline classification accuracy. These results highlight the potential of V-MTJ/CMOS reconfigurable neurons to reduce computational activity and enable compact, energy-efficient brain-inspired computing systems.