MEGATRON: a 28nm Analog PCM CiM/Digital System-on-Chip for Edge GenAI at 57.5 TOPS/W and 1.52 Mparam/mm${}^2$

2026-09-28

AI Summary

This work addresses the bottlenecks of low computational energy efficiency and insufficient memory density in edge generative AI by proposing a heterogeneous SoC architecture that integrates phase-change memory (PCM)-based analog compute-in-memory (CiM) with RISC-V digital processing units. Fabricated in a 28nm FD-SOI process, this design introduces a novel synergistic mechanism between analog PCM CiM and a digital neural processor, overcoming conventional limitations in energy efficiency and density. Measurement results demonstrate that the system achieves a peak energy efficiency of 57.5 TOPS/W at 4-bit quantization precision and a storage density of 1.52 Mparam/mm². These findings present a highly competitive hardware solution for energy-efficient edge AI inference.

Abstract

We present MEGATRON, a heterogeneous Edge GenAI System-on-Chip in 28nm FD-SOI CMOS technology combining a non-volatile analog in-memory-computing engine based on a 4Mi-cell phase-change memory (PCM) array with a digital RISC-V-based flexible neural processing unit. MEGATRON demonstrates up to 3.5 TOPS/W using the RISC-V processors and 57.5 TOPS/W with PCiM, at a storage density of 1.52 Mparam/mm${}^2$ with 4-bit effective weight precision.

Problem

• Edge GenAI
• Compute-in-Memory
• Phase-Change Memory
• System-on-Chip
• Energy Efficiency

Innovation

• Analog In-Memory Computing
• Phase-Change Memory (PCM)
• Edge GenAI
• System-on-Chip (SoC)
• RISC-V