Libra: Architectural Support For Principled, Secure And Efficient Balanced Execution On High-End Processors (Extended Version)

2024-09-05

Conference on Computer and Communications Security

AI Summary

To mitigate control-flow leakage (CFL) attacks induced by secret-dependent branches in high-performance processors, this paper proposes the first secure and efficient control-flow balancing solution that operates *without disabling the instruction cache or prefetcher*. Methodologically, we introduce a control-flow semantic model, a hardware-software co-design framework named Libra, a formally verifiable code transformation algorithm, and a lightweight hardware extension for side-channel mitigation. Our key contribution is the first practical branch-balanced execution scheme for high-end out-of-order processors that jointly achieves strong security guarantees and high performance. Evaluated on a RISC-V prototype, our approach incurs performance overhead comparable to non-secure balanced code, outperforms the state-of-the-art linearization-based solution by 19.3% on average, and demonstrates effectiveness across standard benchmarks including SPEC CPU2017.

Technology Category

• Machine Learning: Hardware-aware ML
• Computer Vision: Adversarial Attacks & Robustness
• Natural Language Processing: Safety and Robustness

Application Category

• Security and Privacy: Large-scale security measurements
• Responsible Web: Data and user privacy-enhancing technologies for the Web
• User Modeling, Personalization and Recommendation: Attacks and countermeasures in recommendation systems

Abstract

Control-flow leakage (CFL) attacks enable an attacker to expose control-flow decisions of a victim program via side-channel observations. Linearization (i.e., elimination) of secret-dependent control flow is the main countermeasure against these attacks, yet it comes at a non-negligible cost. Conversely, balancing secret-dependent branches often incurs a smaller overhead, but is notoriously insecure on high-end processors. Hence, linearization has been widely believed to be the only effective countermeasure against CFL attacks. In this paper, we challenge this belief and investigate an unexplored alternative: how to securely balance secret-dependent branches on higher-end processors? We propose Libra, a generic and principled hardware-software codesign to efficiently address CFL on high-end processors. We perform a systematic classification of hardware primitives leaking control flow from the literature, and provide guidelines to handle them with our design. Importantly, Libra enables secure control-flow balancing without the need to disable performance-critical hardware such as the instruction cache and the prefetcher. We formalize the semantics of Libra and propose a code transformation algorithm for securing programs, which we prove correct and secure. Finally, we implement and evaluate Libra on an out-of-order RISC-V processor, showing performance overhead on par with insecure balanced code, and outperforming state-of-the-art linearized code by 19.3%.

Problem

• Secure balancing of secret-dependent branches
• Control-flow leakage attacks mitigation
• High-end processors performance optimization

Innovation

• Hardware-software codesign
• Secure control-flow balancing
• Code transformation algorithm