ReSCom: A Reconfigurable Spiking Neural Network Accelerator Using Stochastic Computing

2026-06-11

AI Summary

This work addresses the high power consumption, large area overhead, and instability in state updates caused by approximate computing in hardware implementations of spiking neural networks (SNNs). To this end, the authors propose ReSCom, a reconfigurable SNN accelerator that integrates stochastic computing to simplify multiplication while retaining precise fixed-point addition and subtraction, thereby balancing inference stability and hardware efficiency. The architecture supports dynamic trade-offs among precision, latency, and energy consumption at runtime. Its unified, reconfigurable neuron design is compatible with integrate-and-fire (IF), leaky integrate-and-fire (LIF), and synaptic neuron models, enabling explicit control through adjustable stochastic bitstream lengths. Implemented on a Xilinx Artix-7 FPGA, the system achieves 92.80% accuracy on MNIST with an energy cost of only 0.05 mJ per image at 100 MHz, demonstrating superior energy efficiency compared to existing approaches.

Abstract

Spiking Neural Networks (SNNs) provide an attractive framework for energy-efficient inference due to their event-driven computation and biologically inspired dynamics. However, efficient hardware realization of SNNs remains challenging because neuronal computations incur significant power and area costs, and uncontrolled approximate arithmetic can destabilize recurrent state updates when precision is not properly managed. To address these challenges, this paper presents ReSCom, a reconfigurable SNN accelerator that leverages stochastic computing to reduce hardware complexity while maintaining stable inference. The proposed architecture employs stochastic arithmetic for multiplication operations in neuron dynamics, while preserving exact fixed-point addition/subtraction operations. This stochastic strategy enables runtime trade-offs between accuracy, latency, and energy consumption. A unified reconfigurable neuron design supports Integrate-and-Fire (IF), Leaky Integrate-and-Fire (LIF), and Synaptic neuron models within a single hardware framework. Experimental results for MNIST inference on a Xilinx Artix-7 FPGA show that ReSCom achieves $92.80\%$ classification accuracy while consuming just $0.05~\mathrm{mJ}$ of operational energy per image at $100~\mathrm{MHz}$, outperforming the energy efficiency of recent state-of-the-art implementations. Furthermore, managing the stochastic bit-stream length allows explicit, dynamic control over accuracy-latency-energy trade-offs to meet target application constraints.

Problem

• Spiking Neural Networks
• hardware efficiency
• stochastic computing
• precision management
• energy consumption

Innovation

• stochastic computing
• reconfigurable SNN accelerator
• neuron dynamics
• accuracy-latency-energy trade-off
• hybrid arithmetic