🤖 AI Summary
To address the low throughput and poor execution efficiency of hardware-in-the-loop (HIL) fuzzing on resource-constrained embedded devices such as microcontrollers (MCUs), this paper proposes a lightweight in-situ fuzzing architecture. Unlike conventional approaches, it eliminates firmware emulation dependencies and performs fuzzing directly on real hardware, leveraging fine-grained execution optimizations and a compact test-case scheduling mechanism to significantly reduce runtime overhead. The method is fully compatible with existing embedded testing frameworks and requires no hardware modifications or dedicated debug interfaces. Experimental evaluation on representative MCU platforms demonstrates that, compared to state-of-the-art solutions (e.g., FirmFuzz, IoTFuzzer), our approach achieves an average 3.2× improvement in fuzzing throughput, accelerates vulnerability discovery by 2.8×, and reduces memory footprint by 47%.
📝 Abstract
In this paper we show E-FuzzEdge, a novel fuzzing architecture targeted towards improving the throughput of fuzzing campaigns in contexts where scalability is unavailable. E-FuzzEdge addresses the inefficiencies of hardware-in-the-loop fuzzing for microcontrollers by optimizing execution speed. We evaluated our system against state-of-the-art benchmarks, demonstrating significant performance improvements. A key advantage of E-FuzzEdgearchitecture is its compatibility with other embedded fuzzing techniques that perform on device testing instead of firmware emulation. This means that the broader embedded fuzzing community can integrate E-FuzzEdge into their workflows to enhance overall testing efficiency.