🤖 AI Summary
This work addresses the high authentication error rates in SRAM physically unclonable functions (PUFs) deployed on resource-constrained industrial IoT devices, stemming from their inherent unreliability. To mitigate this issue, the authors propose a lightweight stabilization scheme that integrates Hamming code error correction (HC) with time-based majority voting (TMV), complemented by a threshold-tunable authentication mechanism. A key innovation lies in reframing the gap between reliability and security constraints as a design budget, which guides resource-aware parameter configuration to simultaneously ensure security and minimize overhead. Experimental results demonstrate that the proposed approach reduces the post-authentication bit error rate to below 1%, effectively establishing a PUF design space that balances error correction capability with resource efficiency.
📝 Abstract
Static Random Access Memory (SRAM) Physically Unclonable Functions (PUFs) make use of intrinsic manufacturing variations in memory cells to derive device-unique responses. Employing such hardware-rooted fingerprints for authentication, this work demonstrates a threshold-based authentication proof of concept for constrained Industrial Internet of Things (IIoT) devices. The proposed scheme can reliably cap the the post-authentication bit error rate (BER) below 1 %. Inherent SRAM PUF unreliability is addressed by a resource-efficient combination of Hamming code (HC) Error Correction (EC) and Temporal Majority Voting (TMV). Increasing HC redundancy or TMV count significantly reduces the BER, albeit with diminishing returns and increasingly prohibitive computational overhead. Furthermore, this work quantifies the threshold gap between strict reliability and security constraints. This gap is reframed as a design budget which enables the resource-aware calibration of the acceptance threshold, PUF response length, and stabilization technique, without violating designed-for error limits. Larger responses make reliability optimizations increasingly obsolete. This comparative analysis establishes a comprehensive design space for PUF EC, guiding future implementations in balancing EC quality against resource constraints such as computational demand, power consumption, and implementation complexity.