Scholar
Ghaith Bany Hamad
Google Scholar ID: 2RyPlIAAAAAJ
Stanford University
Artificial Intelligence
Machine Learning
Formal verification
ASIC Design and Verification
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Citations & Impact
All-time
Citations
798
H-index
14
i10-index
20
Publications
20
Co-authors
13
list available
Contact
No contact links provided.
Publications
2 items
FVRuleLearner: Operator-Level Reasoning Tree (Op-Tree)-Based Rules Learning for Formal Verification
IEEE VLSI Test Symposium · 2026
Cited
1
AssertionForge: Enhancing Formal Verification Assertion Generation with Structured Representation of Specifications and RTL
2025
Cited
0
Resume (English only)
Co-authors
13 total
Co-author 1
Co-author 2
Co-author 3
Syed Rafay Hasan
Professor, Tennessee Technological University
Co-author 5
Co-author 6
Mark H. Ren
Nvidia
Co-author 8
