Matteo Perotti
Scholar

Matteo Perotti

Google Scholar ID: 4mZijPIAAAAJ
ETH Zürich
Electronic engineeringcomputer architectureRISC-V
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Citations & Impact
All-time
Citations
291
 
H-index
10
 
i10-index
10
 
Publications
20
 
Co-authors
13
list available
Contact
No contact links provided.
Publications
8 items
TROOP: At-the-Roofline Performance for Vector Processors on Low Operational Intensity Workloads
2025
Cited
0
AraOS: Analyzing the Impact of Virtual Memory Management on Vector Unit Performance
2025
Cited
0
Quadrilatero: A RISC-V programmable matrix coprocessor for low-power edge applications
2025
Cited
0
A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications
2025
Cited
0
AraXL: A Physically Scalable, Ultra-Wide RISC-V Vector Processor Design for Fast and Efficient Computation on Long Vectors
2025
Cited
0
Stella Nera: Achieving 161 TOp/s/W with Multiplier-free DNN Acceleration based on Approximate Matrix Multiplication
arXiv.org · 2023
Cited
4
Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency
arXiv.org · 2023
Cited
2
A “New Ara” for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design
IEEE International Conference on Application-Specific Systems, Architectures, and Processors · 2022
Cited
31
Resume (English only)
Co-authors
13 total
Luca Benini
Luca Benini
ETH Zürich, Università di Bologna
Matheus Cavalcante
Matheus Cavalcante
Stanford University
Lukas Cavigelli
Lukas Cavigelli
Researcher (Expert/Architect), Huawei Technologies
Renzo Andri
Renzo Andri
Huawei Technologies
Angelo Garofalo
Angelo Garofalo
University of Bologna, ETH Zurich
Nils Wistoff
Nils Wistoff
PhD Student, ETH Zurich
Co-author 7
Co-author 7
Yvan Tortorella
Yvan Tortorella
University of Bologna