Lancheng Zou
Scholar

Lancheng Zou

Google Scholar ID: BVgV-swAAAAJ
The Chinese University of Hong Kong
QuantizationElectronic Design Automation
Citations & Impact
All-time
Citations
52
 
H-index
3
 
i10-index
3
 
Publications
11
 
Co-authors
16
list available
Resume (English only)
Academic Achievements
  • Paper accepted at NeurIPS 2025: 'PermLLM: Learnable Channel Permutation for N:M Sparse Large Language Models'
  • Paper accepted at ICML 2024: 'BiE: Bi-Exponent Block Floating-Point for Large Language Models Quantization'
  • Paper accepted at ICCAD 2023: 'Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction'
  • Paper accepted at DAC 2023: 'Mitigating Distribution Shift for Congestion Optimization in Global Placement'
  • Paper accepted at DAC 2024: 'PDRC: Package Design Rule Checking via GPU-Accelerated Geometric Intersection Algorithms for Non-Manhattan Geometry'
  • Invited paper at ISPD 2025: 'Physical Design for Advanced 3D ICs: Challenges and Solutions'
  • Journal paper accepted by IEEE TCAD 2025: 'Oiso: Outlier-isolated Data Format for Low-bit Large Language Model Quantization'
  • Journal paper accepted by IEEE TCAD 2025: 'Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction'
  • Journal paper accepted by ACM TODAES 2025: 'HAPE: Hardware-Aware LLM Pruning For Efficient On-Device Inference Optimization'
  • Recipient of Full Postgraduate Studentship from The Chinese University of Hong Kong (2023–2027)