Scholar
Tuan Ta
Google Scholar ID: MLsykCIAAAAJ
AMD Research and Advanced Development
Citations & Impact
Citations
617
H-index
9
i10-index
7
Publications
20
Co-authors
0
Publications
Resume (English only)
Academic Achievements
- Published multiple papers on topics such as SoC design, vector engines, data-parallel acceleration, power delivery and thermal-aware 3D architectures, etc.; holds a patent titled 'Vectorized Operations for Sparse Kernels' (US 20230367843A1).
Research Experience
- Worked as a research co-op at AMD Research on modeling AMD’s next-generation GPU’s cache system and developing a cache coherence testing framework in gem5 simulator in 2017; interned at Arm Research to explore wafer-scale many-core architecture and Arm’s Scalable Matrix Extension (SME) during his PhD.
Education
- Received a Bachelor's degree in Computer Science from the University of Mississippi in 2016; earned a Ph.D. in Electrical and Computer Engineering from Cornell University in 2024, advised by Prof. Christopher Batten.
Background
- Currently a CPU architect at Tenstorrent, focusing on high-performance RISC-V processors. Research interests include efficient parallel frameworks, support for heterogeneous multi-core systems, next-generation vector architectures, and sparse matrix computation.
Co-authors