Published multiple conference papers on topics such as formal analysis of networked PLC controllers, rigorous model engineering of hierarchical multirate CPSs, formal semantics and analysis of multitask PLC ST programs, formal specification of trusted execution environment APIs, symbolic analysis and parameter synthesis for time Petri nets, and more.
Research Experience
Served as a program committee (co-)chair or member for multiple international conferences such as WRLA 2022, FormaliSE 2020, FACS 2018, etc. Contributed to the development of several software tools, including the HybridSynchAADL tool, stlMC bounded model checker, etc.
Education
No detailed educational background information provided.
Background
Associate Professor in the Department of Computer Science and Engineering at POSTECH, leading the Software Verification Laboratory. Research interests include developing safe, reliable, and secure software, cyber-physical, and AI-based systems; scalable yet precise automatic analysis techniques based on model checking, automated reasoning, and computational logic.
Miscellany
Teaches various courses, including Theory of Computation, Principles of Software Construction, Programming Studio, Software Design Methods, Software Verification, Programming Languages, Logic in Computer Science, and Software Engineering.