Scholar
Xiaoling Yi
Google Scholar ID: a1Oa9d4AAAAJ
MICAS - ESAT, KU Leuven, Belgium
Multi-core accelerator Computer architecture Digital circuit design
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Citations & Impact
All-time
Citations
42
H-index
3
i10-index
1
Publications
15
Co-authors
7
list available
Publications
9 items
STELLA: A 16nm Spatio-Temporal Elastic Low-Latency CGRA for Multi-Stage Pipelined Applications
2026
Cited
0
A 16 nm 1.60TOPS/W High Utilization DNN Accelerator with 3D Spatial Data Reuse and Efficient Shared Memory Access
2026
Cited
0
Torrent: A Distributed DMA for Efficient and Flexible Point-to-Multipoint Data Movement
2025
Cited
0
The Configuration Wall: Characterization and Elimination of Accelerator Configuration Overhead
2025
Cited
0
Precision-Scalable Microscaling Datapaths with Optimized Reduction Tree for Efficient NPU Integration
2025
Cited
0
An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems
2025
Cited
0
XDMA: A Distributed, Extensible DMA Architecture for Layout-Flexible Data Movements in Heterogeneous Multi-Accelerator SoCs
2025
Cited
0
Efficient Precision-Scalable Hardware for Microscaling (MX) Processing in Robotics Learning
2025
Cited
0
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Co-authors
4 total
Marian Verhelst
Micas - ESAT - KU Leuven, Belgium
Li Shang
Fudan University, Univ. Colorado Boulder
Guilherme Paim
INESC-ID, Instituto Superior Técnico, Universidade de Lisboa
Jiangnan Yu
The Hong Kong University of Science and Technology
