Scholar
Chandan Karfa
Google Scholar ID: pp-UnuoAAAAJ
Indian Institute of Technology Guwahati
EDA
ML for EDA
Formal Verification
High-level Synthesis
Hardware Security
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Citations & Impact
All-time
Citations
505
H-index
12
i10-index
19
Publications
20
Co-authors
13
list available
Publications
6 items
MOAT: Model-Agnostic Randomized Transformations for preventing Efficiency Degradation Attacks on ViTs
2026
Cited
0
A Survey of Adversarial Efficiency Degradation for Vision Transformer by Exploiting Input-adaptive Optimization
2026
Cited
0
LLM Assisted Verification Assertion Generation: Challenges and Future Directions
2026
Cited
0
Controller Datapath Aware Verification of Masked Hardware Generated via High Level Synthesis
2026
Cited
0
STRAP-ViT: Segregated Tokens with Randomized -- Transformations for Defense against Adversarial Patches in ViTs
2026
Cited
0
David vs. Goliath: Can Small Models Win Big with Agentic AI in Hardware Design?
2025
Cited
0
Co-authors
5 total
Kunal Banerjee
Data Science Foundation, Walmart
Ramesh Karri కర్రి రమేష్
Professor of Electrical and Computer Engineering, New York University
Purandar Bhaduri
Professor, IIT Guwahati
Siddharth Garg
Institute Associate Professor, New York University
Christian Pilato
Associate Professor, Politecnico di Milano
