Scholar
Masanori Hashimoto
Google Scholar ID: sRfe3mgAAAAJ
Kyoto University
VLSI
EDA
Reconfigurable architecture
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Citations & Impact
All-time
Citations
1,280
H-index
17
i10-index
42
Publications
20
Co-authors
19
list available
Contact
Email
hashimoto@i.kyoto-u.ac.jp
Publications
4 items
VeRA+: Vector-Based Lightweight Digital Compensation for Drift-Resilient RRAM In-Memory Computing
2026
Cited
0
In-Situ Hardware Error Detection Using Specification-Derived Petri Net Models and Behavior-Derived State Sequences
2025
Cited
0
A 55-nm SRAM Chip Scanning Errors Every 125 ns for Event-Wise Soft Error Measurement
2025
Cited
0
Efficient Calibration for RRAM-based In-Memory Computing using DoRA
2025
Cited
0
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Background
Professor, Integrated Systems Engineering Laboratory, Graduate School of Informatics, Kyoto University
Co-authors
6 total
Wang LIAO
Kochi University of Technology
Takashi Sato
Kyoto University
Cheng Zhuo
Zhejiang University
Ulf Schlichtmann
Professor for Electronic Design Automation, Technical University of Munich
Sani Nassif
Radyalis LLC
Jaehoon Yu
Samsung Electronics