Thiem Van Chu
Scholar

Thiem Van Chu

Google Scholar ID: tsrK3W4AAAAJ
Institute of Science Tokyo
Computer ArchitectureFPGAMachine Learning
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Citations & Impact
All-time
Citations
328
 
H-index
10
 
i10-index
10
 
Publications
20
 
Co-authors
0
 
Publications
3 items
Binary Quadratic Quantization: Beyond First-Order Quantization for Real-Valued Matrix Compression
2025
Cited
0
Annealed Mean Field Descent Is Highly Effective for Quadratic Unconstrained Binary Optimization
2025
Cited
0
Partially Frozen Random Networks Contain Compact Strong Lottery Tickets
2024
Cited
1
Resume
Academic Achievements
  • He has received multiple research grants as a principal investigator, including Grant-in-Aid for Scientific Research (B), Grant-in-Aid for Early-Career Scientists, and Grant-in-Aid for JSPS Fellows. He has also been involved in several collaborative research projects such as JST Strategic Basic Research Programs ALCA-Next and CREST. His students have won multiple awards, and he has received several best paper awards at IEEE international conferences. He has published numerous high-impact academic papers.
Research Experience
  • Previously, he was an Assistant Professor in the AI Computing Research Unit at Tokyo Institute of Technology and the School of Information Science at Japan Advanced Institute of Science and Technology.
Education
  • Received a Ph.D. in Engineering from Tokyo Institute of Technology in 2018.
Background
  • Currently an Associate Professor in the Department of Information and Communications Engineering at the Institute of Science Tokyo (formerly Tokyo Institute of Technology). His research interests include computer architecture, FPGAs/reconfigurable computing, systems, and machine learning, with recent work focusing on efficient algorithms and hardware for machine learning and sparse data processing.
Miscellany
  • Email: thiem@ict.eng.isct.ac.jp