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Techniques and instrumentation for measuring, modeling, and characterizing electrical power and energy consumption of systems, components, or wireless links to validate performance and constraints. This covers empirical measurement across hardware platforms, modeling runtime/energy trade-offs for low-power targets, and quantifying received or transmitted power changes under configurations.
To address the widespread lack of hardware-level power measurement capability in IoT embedded devices, this paper proposes a lightweight software-based power estimation algorithm that integrates an external low-cost USB power meter with data-driven modeling. Our method innovatively combines long-term physical calibration, fine-grained runtime resource feature extraction (e.g., CPU/GPU utilization and frequency), and a lightweight regression model to enable real-time, program-level instantaneous power prediction directly on-device. A custom Linux kernel module ensures synchronized USB sampling and feature acquisition. Evaluated on Jetson Nano and Raspberry Pi platforms, the approach achieves an average estimation accuracy of 92%, with minimal deployment overhead and over 90% reduction in total cost compared to hardware-integrated solutions. Crucially, it requires no hardware modification, offering a high-accuracy, low-cost, and easily deployable power profiling paradigm for resource-constrained IoT devices.
This study challenges the conventional assumption that device power consumption is predominantly determined by hardware, instead investigating the influence of user behavior on system-level energy usage. Leveraging Intel telemetry data, the research employs exploratory data analysis and linear regression models to compare power consumption patterns across users in different countries, with a focus on the United States and China. The findings reveal a statistically significant association between user behavior and overall power draw, demonstrating that behavioral factors exert a non-negligible impact on energy consumption. This insight offers a novel perspective for green computing initiatives and provides empirical evidence to inform stakeholders such as Intel in refining energy-efficiency strategies and mitigating environmental impact.
To address the challenges of low accuracy, high overhead, and slow response in online power estimation under enhanced hardware heterogeneity and increased parallelism for embedded systems, this paper proposes a lightweight system-level power modeling and real-time monitoring method based on Performance Monitoring Counters (PMCs). The method constructs a modular, linear-correlation-driven power model that requires no microarchitectural details and supports flexible, rapid reconfiguration across DVFS states. Integrated with the Linux kernel-level framework Runmeter, it enables low-overhead PMC sampling and runtime power estimation. Experimental results demonstrate an average power estimation error of only 7.5%, energy error of 1.3%, and worst-case kernel monitoring overhead below 0.7%. This enables effective closed-loop task scheduling and workload-aware DVFS control.
Accurately modeling energy consumption in 5G radio access networks (RANs) remains challenging due to technological heterogeneity and deployment diversity. To address this, this paper proposes a fine-grained, configurable cross-layer energy consumption model. For the first time, it jointly incorporates physical-layer algorithmic complexity and hardware implementation characteristics, using computational cycles as a unifying metric to holistically characterize energy consumption across baseband processing, user equipment access, and channel interaction. The model is calibrated via MATLAB simulations and empirical measurements on Intel platforms. Validation across diverse deployment scenarios demonstrates an average error of less than 8%, significantly outperforming existing approaches. The proposed model enables cross-application energy-efficiency benchmarking and network-level green optimization. It establishes a new paradigm for verifiable and scalable energy-efficiency assessment of 5G RANs.
Traditional optical time-domain reflectometry (OTDR) suffers from low energy efficiency and poor scalability in optical network monitoring. Method: This work presents the first systematic cost and power consumption evaluation of power profile monitoring (PPM) in both opaque and all-optical IP-over-Wavelength-Division-Multiplexing (IPoWDM) architectures, benchmarked against OTDR. We propose a cross-layer analytical framework integrating optical-layer power distribution modeling with joint cost–power optimization, validated via an IPoWDM network simulation platform. Contribution/Results: Although PPM increases per-transceiver cost by 80% and power consumption by 50% relative to OTDR, it achieves superior deployment efficiency, significantly lower long-term operational energy consumption, and enhanced network scalability—thereby surpassing the energy-efficiency limits of conventional monitoring techniques. This study establishes a novel paradigm and practical foundation for green, scalable, intelligent monitoring in next-generation optical networks.
Existing software energy measurement tools struggle to balance accuracy and overhead while often being constrained to specific hardware or programming languages, limiting their cross-platform portability. This work proposes CodeGreen, a modular energy measurement platform that innovatively integrates Tree-sitter–based AST queries to enable automatic, multi-language instrumentation. By decoupling instrumentation from measurement through an asynchronous producer-consumer architecture, CodeGreen supports fine-grained energy analysis for languages including Python, C/C++, and Java. Its Native Energy Measurement Backend (NEMB) unifies polling of hardware sensors such as Intel RAPL, NVIDIA NVML, and AMD ROCm. Evaluated on the Computer Language Benchmarks Game, CodeGreen achieves an energy estimation accuracy with a coefficient of determination of R² = 0.9934 and demonstrates near-perfect workload linearity (R² = 0.9997), offering both high precision and low overhead.
This study addresses the challenge of accurately attributing CPU and DRAM energy consumption to individual application-level threads. We propose a fine-grained, thread-level energy attribution model—the first to systematically incorporate the effects of simultaneous multithreading (SMT), dynamic frequency scaling, multi-socket architectures, and NUMA-aware memory access patterns. Leveraging hardware performance counters and low-level Intel processor data on Linux, we implement METRION: an open-source, extensible framework for runtime energy estimation. Evaluated across three representative workloads, METRION achieves mean absolute errors of 4.2% for CPU and 16.1% for DRAM energy—substantially outperforming prior approaches. The model is platform-agnostic, enabling cross-architecture deployment with minimal overhead. By delivering high-accuracy, application-level energy profiling, METRION supports effective power-aware optimization and advances green computing initiatives in information technology.
This study addresses the critical challenge of limited battery life on mobile devices, noting that existing power-saving recommendations often lack empirical grounding in real user behavior. To bridge this gap, the authors propose an automated monitoring framework that systematically evaluates the energy impact of user-controllable settings—such as screen brightness, refresh rate, network connectivity, interface theme, battery saver mode, and in-app configurations—by simulating authentic usage patterns across popular applications including WhatsApp, Instagram, TikTok, and YouTube. Drawing on over 12,000 experimental trials, this work presents the first large-scale quantitative analysis of how these configurable parameters affect energy consumption, elucidating the trade-offs between user experience and battery longevity, and offering scientifically grounded, actionable guidance for end users seeking to extend device runtime.
This study addresses the multi-objective trade-offs among generation quality, energy consumption, latency, and memory when deploying large language models on edge devices. The authors construct a reproducible empirical evaluation framework to systematically analyze the energy efficiency, performance, and privacy characteristics of models ranging from 0.5B to 9B parameters on a real-world Android device (Samsung Galaxy S25 Ultra). Leveraging non-intrusive, fine-grained power monitoring and mixed-precision inference, they uncover a “quantization-energy paradox”: model architecture—not quantization strategy—dominates energy consumption. Notably, Mixture-of-Experts architectures disrupt conventional scaling–energy relationships, and medium-scale models such as Qwen2.5-3B emerge as the optimal choice, balancing high output quality with energy efficiency, thereby offering practical deployment guidelines for on-device intelligence.
This study addresses the significant time and energy overhead (0.25%–46.75%) incurred by existing tools for high-frequency RAPL-based power monitoring, which rely on system calls and frequent polling. Through two controlled experiments evaluating seven tools at a 1 kHz sampling rate, the authors develop lightweight user-space applications and kernel modules that directly access model-specific registers (MSRs) using low-level instructions such as rdmsr, bypassing the high-overhead /proc interface. Their findings reveal that system calls are substantially slower than rdmsr, which in turn is slower than common instructions like cpuid. Based on these insights, the work proposes design principles emphasizing architectural simplification and preferential use of low-level instructions, thereby reducing monitoring overhead to near-baseline levels and enabling efficient high-frequency energy analysis.