hardware engineering

Existing SysML model verification approaches lack the capability to ensure physical correctness—particularly adherence to fundamental physical laws such as energy conservation and dynamical constraints—in electro-mechanical coupled systems. To address this, we propose the first SysML verification framework explicitly designed for multi-domain physical consistency, operating across two complementary dimensions: structural views (Block Definition Diagrams and Internal Block Diagrams) and functional views (Activity Diagrams). Our method tightly integrates formal functional semantics with cross-domain physical principles (electromagnetic, mechanical, and thermal), enabling rule-driven constraint solving and logical inference. It supports automated detection of both structural integrity and physical plausibility of functional behavior. We evaluate the framework on four real-world electromechanical systems—coffee machine, vacuum cleaner, hair dryer, and wired speaker—demonstrating its effectiveness in significantly enhancing automated, physics-aware consistency verification during early SysML-based design phases.

This work addresses the challenges in automated PCB schematic design, which are hindered by heterogeneous signal processing, difficulties in modeling realistic IC package constraints, and a lack of open-source datasets and validation methodologies. The authors propose the first training-free framework for automatic schematic generation, integrating large language model agents with constraint-guided synthesis. By leveraging domain-specific prompts, the system iteratively generates circuit code and constructs a knowledge graph derived from IC datasheets to enable precise validation of both topological structure and pin semantics. The approach supports mixed-signal designs encompassing digital, analog, and power circuits, demonstrating significant improvements in design accuracy and computational efficiency across 23 real-world tasks, thereby establishing a novel training-free paradigm for PCB schematic generation.

This work addresses the ongoing challenge of automatically translating natural language specifications into editable printed circuit board (PCB) schematics for embedded and IoT development. It presents the first end-to-end approach that leverages tool-augmented large language model reasoning, integrating component library retrieval, datasheet knowledge extraction, execution validation, and structural-semantic verification to generate KiCad-compliant schematics. The system supports iterative refinement through an interactive web interface and achieves a pass@1 rate of 0.90 and a pass@5 rate of 1.00 across 20 embedded schematic generation tasks. This method efficiently produces high-quality initial drafts suitable for early-stage prototype review, substantially advancing the state of hardware design automation.

Electronic waste generation is exacerbated by conventional soldering, which creates irreversible electrical interconnections, severely impeding component recovery and reuse. To address this, we propose a solder-free, thermoplastic hot-press packaging technique that directly embeds electronic components into thermoplastic substrates via thermoforming and pressure forming—enabling robust, reversible electrical and mechanical integration on flexible, paper-based, and non-planar substrates. This approach eliminates the need for custom enclosures or specialized tooling, significantly accelerating prototyping iteration and enhancing component reusability. Experimental validation confirms that the resulting circuits exhibit excellent conductivity, bending stability, and resilience to repeated assembly–disassembly cycles. To our knowledge, this work represents the first systematic integration of thermoforming into printed circuit assembly, establishing a scalable, substrate-agnostic, green manufacturing paradigm for sustainable electronics design.

This work addresses the behavioral gap between formal verification and actual execution in traditional engineering approaches, which often neglect execution semantics. To bridge this semantic divide, the paper proposes a Modeling and Simulation-Based Engineering (MSBE) methodology that explicitly treats execution semantics as a first-class engineering entity. It defines executability as the admissible model space induced by the stabilization of execution conditions and unifies model behavior with physical execution through an iterative cycle of formal execution, experimental execution, verification, and activity-mediated validation. Integrating formal methods, simulation-based verification, activity theory, and constraint modeling, MSBE establishes a general-purpose engineering framework applicable to diverse cyber-physical systems (CPS). The approach demonstrates its generality and effectiveness across four CPS categories: human-centric, biophysical, technological, and digital twin systems.

This work addresses a critical limitation of traditional program repair approaches, which focus solely on code while overlooking the possibility that requirements themselves may be erroneous or outdated, leading to inconsistencies between system implementation and intended specifications. To bridge this gap, the paper introduces the first automated requirement repair framework tailored for Simulink Requirements Tables, shifting the repair target from code to requirements. The framework analyzes system execution traces, handles real-valued temporal signals, evaluates the semantics of declarative requirements, and automatically generates corrective patches. Evaluated across six real-world case studies involving twelve requirements, seven variants of the framework successfully produced correct and meaningful repairs, effectively restoring compliance between requirements and system behavior and addressing a key research gap in the co-evolution of requirements and implementations.