circuit-wl correspondence

This paper develops symmetric algebraic complexity theory, addressing the central question: when can a family of symmetric polynomials be computed by small symmetric algebraic circuits? The authors establish the first exact correspondence between symmetric circuit complexity and graph structural parameters—namely, treewidth and vertex cover number—proving that a symmetric polynomial is computable by a small symmetric circuit if and only if it admits a linear combination representation of homomorphism-counting polynomials over graphs of bounded treewidth. This transforms conditional classifications into unconditional characterizations, fully resolving the symmetric complexity of subgraph-counting polynomials. It further yields the first unconditional dichotomy for the immanant family under symmetric computation and rigorously establishes exponential lower bounds for the permanent and related functions in the symmetric circuit model.

This work addresses the challenge of establishing unconditional lower bounds in algebraic complexity theory by focusing on symmetric computation models. We introduce the symmetric algebraic complexity classes symVP, symVBP, and symVF, characterizing their computational power via orbit-size polynomials. For the first time, we unconditionally prove the strict inclusions symVF ⊊ symVBP ⊊ symVP and establish connections between these classes and graph homomorphism polynomials whose underlying graphs have bounded treedepth or pathwidth. Furthermore, under the parameterized complexity assumption VFPT ≠ VW[1], we demonstrate the completeness of several homomorphism polynomials for the classes VBP, VP, and VNP, thereby significantly expanding the known landscape of natural complete problems in algebraic complexity.

本文研究了群同构问题的低深度电路复杂性，通过一种基于群结构的新策略，证明了深度2布尔电路需要准多项式大小，并提供了深度2.5电路的上界。

This work aims to formalize the foundational principles of higher-order circuit diagrams and their correspondence with higher-order quantum theories. By introducing nested structures, spatiotemporal composition, and an equivalence between lower-order bipartite processes and higher-order bipartite states, the authors construct an axiomatic framework for higher-order circuits. Methodologically, they uniquely combine enrichment in symmetric multicategories with cotensorial structure and impose Frobenius-like coherence conditions. The primary contribution lies in establishing a rigorous categorical foundation for higher-order circuits and proving that any such theory can be faithfully embedded into the theory of strong profunctors, thereby delineating its theoretical upper bound and semantic boundaries.

Digital circuits lack a fully compositional theoretical foundation. Method: This paper establishes the first complete compositional semantic framework for sequential digital circuits. It introduces a non-delay-guarded feedback elimination reduction, defines a novel family of equations enabling equivalent transformation of circuits into canonical form, and unifies denotational, operational, and algebraic semantics—grounded in symmetric trace categories, stream function semantics, structured operational semantics, and observational equivalence theory. Contribution/Results: It provides the first mutual consistency verification and soundness-and-completeness proofs across all three semantic styles; establishes a rigorous mathematical foundation for black-box, freely composable circuit design; and enables precise behavioral characterization, equivalence reasoning, and the development of formal verification and synthesis tools.

Existing symmetry-enhanced resolution proof systems suffer from prohibitive computational complexity, limiting their practicality, and the theoretical limits of dynamic symmetries have long remained unclear. This work introduces the notion of “small symmetries,” which restricts the number of variables involved in each symmetry operation, yielding a new proof system that balances theoretical tractability with practical potential. The paper establishes, for the first time, a strict hierarchy between local and global small symmetries based on symmetry size, proving exponential separations in proof length across different levels. Notably, even the weakest level of this hierarchy substantially surpasses both standard resolution and constant-depth Frege systems in proof strength. Additionally, this work resolves the long-standing open problem of achieving an exponential separation between the SRCI and SRII proof systems.

本文针对电路图示等价性问题，提出了三个难度递增的基准测试，并使用TPTP和SMT-LIB格式进行了一阶编码，生成了相应的测试实例。

For nearly three decades, it has remained an open question whether circuits composed solely of modular counting gates (MODₘ) can efficiently compute the n-ary Boolean AND function. This work addresses this problem within the restricted yet natural model of input-permutation-symmetric MODₘ circuits. By integrating techniques from circuit complexity theory, symmetry-aware constraint modeling, combinatorial analysis, and group action methods, we establish the first optimal subexponential-size lower bound for computing AND in symmetric modular circuits—matching the size of the best-known constructions. Specifically, we prove that any depth of symmetric MODₘ circuit requires subexponential size to compute AND, and that this bound is already tight at depth two. Furthermore, we extend our result to generalized symmetric settings with nested block structures, yielding similarly tight lower bounds.

This work investigates the optimization of size and degree complexity for depth-2 linear circuits computing the N-th order disjointness matrix. Building upon the Jukna–Sergeev rebalancing framework, we introduce a controlled discrete rebalancing mechanism that integrates cost landscape modeling in the (p,q)-plane, Lyapunov exponent analysis of random matrix products, and convex optimization-based upper bounding techniques to uncover dominant circuit families across distinct parameter regimes. Our approach achieves a circuit size of O(2^{1.24485N}) over the {0,1} domain and reduces the degree to O(2^{0.3199N}) over the {0,±1} domain, substantially improving upon the prior results of Alman and Li.

This work addresses the completeness of transformation rules in reversible logic synthesis by introducing, for the first time, a complete rewrite rule set ℛ𝒞⁺ applicable to arbitrary reversible circuits, explicitly distinguishing scenarios with and without ancilla bits and garbage outputs. A restricted subset ℛ𝒞ʳ is further derived for the ancilla- and garbage-free setting. By leveraging the algebraic structure of reversible circuits and formal reasoning, the authors rigorously prove the completeness of these rule sets, demonstrating that commonly used practical rewrite rules are sufficient to constitute a complete rewriting framework. This result establishes a foundational theoretical basis for automated optimization, template generation, and equivalence verification of reversible and quantum circuits.