network programming

Ensuring functional correctness and performance resilience of network protocols under component failures and adversarial attacks remains a significant challenge. Method: This paper proposes a synergistic analysis framework integrating formal verification with attack synthesis. It models protocol behavior using a formal specification language and employs logical predicates, trace analysis, and model checking to achieve closed-loop verification—simultaneously establishing correctness guarantees and automatically generating realistic attack scenarios. Contribution/Results: Diverging from conventional unidirectional verification, our approach innovatively embeds attack-path generation directly into the verification workflow, enabling reproducible and interpretable failure attribution. Experimental evaluation across multiple mainstream network protocols demonstrates substantial improvements in vulnerability detection rates and attack-surface characterization accuracy. The results validate the feasibility and practicality of formal methods for deep, security-critical analysis of complex network protocols.

This work addresses the inefficiencies and semantic inconsistencies arising from separately implementing driver and monitor programs in traditional hardware module testing. To overcome this, the authors propose a domain-specific language (DSL) tailored to hardware communication protocols, which enables the unified specification of both driver and monitor logic through an imperative syntax, thereby ensuring their semantic consistency for the first time. Building upon this DSL, they develop a prototype tool that leverages waveform parsing and transaction-level trace inference techniques to accurately reconstruct protocol-compliant transaction sequences from raw signal waveforms. Experimental results demonstrate that the approach significantly improves development efficiency, with further validation planned on real-world interconnect protocols such as Wishbone and AXI-Stream.

In serverless computing, tight coupling between network I/O and computation leads to inefficient scheduling, resource underutilization, and inequitable “pay-per-effort” billing. To address this, we propose an I/O externalization architecture that fully delegates network I/O to the platform, enabling applications to express computation solely via deterministic procedures and declarative data dependencies—thereby strictly decoupling computation from data movement. Our key contributions include: (1) an end-to-end outsourced computation model; (2) a platform-level cooperative scheduling mechanism; and (3) transparent, automated I/O handling with environment isolation and output reference guarantees. Experiments demonstrate substantial reductions in task queuing time and network latency, alongside improved resource utilization and system throughput. Furthermore, large-scale deployment validates the feasibility and advantages of a “pay-per-result” service model enabled by this architecture.

Software engineers face significant challenges—including difficulty in modeling, lengthy prototyping cycles, and high verification costs—when developing control algorithms for complex dynamic systems such as communication networks. To address these issues, we propose GIPS, the first model-driven engineering framework that tightly integrates graph-structured integer linear programming (ILP) modeling with automated code generation. Using the domain-specific language GIPSL, users declaratively specify constraints and optimization objectives; GIPS then automatically generates functionally complete, executable Java graph-optimization components. This enables end-to-end rapid prototyping—from high-level specifications to runtime deployment. We validate GIPS on a tree-structured peer-to-peer topology control scenario, demonstrating its correctness, efficiency, and scalability. The full implementation—including source code and a ready-to-run virtual machine demonstration environment—is open-sourced, confirming its practical deployability and engineering utility.

Conventional network telemetry frameworks struggle to support fine-grained traffic measurement, performance diagnostics, and attack detection under stringent memory and computational constraints of high-speed network devices. Method: This paper proposes a lightweight, real-time online telemetry framework that systematically integrates compact data structures—including Bloom filter variants, Count-Min Sketch, and HyperLogLog—with streaming algorithms, hierarchical sampling, and P4-programmable data-plane co-design to comply with hardware limitations. Contribution/Results: Evaluated at line rate exceeding 100 Gbps, the framework reduces memory footprint by over 60% compared to state-of-the-art approaches while maintaining sub-1% flow frequency estimation error. It achieves an optimal trade-off among accuracy, throughput, and resource overhead, thereby significantly enhancing the feasibility and practicality of telemetry in high-bandwidth environments.

Traditional callback-based discrete-event network simulators often suffer from fragmented logic, leading to “callback hell” and stack tearing, which result in complex and poorly maintainable code. This work proposes CoDES—a novel coroutine-based paradigm for discrete-event simulation—that reimagines coroutines not merely as a performance optimization but as a foundational mechanism to reconstruct the network simulation development workflow. By enabling developers to express network events in a natural, sequential manner, CoDES significantly enhances code clarity. Integrated into NS-3, CoDES supports sequential modeling of protocols such as MPI, HPCC, and RIP, achieving up to a 62.3% reduction in code volume and an 82.6% decrease in structural complexity, all while preserving simulation accuracy, runtime performance, and memory overhead.

Traditional interactive debuggers struggle to support distributed systems due to fragmented call stacks across process boundaries, difficulty in maintaining debugging state, and the risk of timeout cascades caused by global halting. This work proposes a novel approach enabling cross-process, source-level interactive debugging by embedding causal metadata into RPCs to reconstruct unified call stacks via distributed backtracing, designing an intent-preserving control plane that automatically coordinates dynamic breakpoints, and virtualizing logical clocks to eliminate temporal discontinuities. The system integrates lightweightly with frameworks such as gRPC, achieving a median cross-RPC backtrace latency of 30 ms, time skew under 5 ms, and throughput overhead of only 1–5% across 122 processes. User studies demonstrate a 100% success rate in fault localization with a median diagnosis time of approximately 8 minutes.

This work addresses the lack of systematic educational resources in high-performance computing (HPC) networking, which poses a significant barrier for researchers entering the field. It presents the first comprehensive integration of the HPC networking stack, covering communication protocol layers, programming interfaces such as MPI, control plane mechanisms, high-speed interconnect technologies, and custom link-layer hardware. The exposition is anchored by a detailed case study of the El Capitan supercomputer architecture at Lawrence Livermore National Laboratory. By offering a well-structured, practice-oriented primer, this contribution fills a critical educational gap and substantially lowers the entry barrier for researchers seeking to master core HPC networking technologies.

Traditional typestate systems struggle to capture quantitative constraints—such as quorum requirements—and concurrent I/O behaviors inherent in distributed protocols, and they lack resilience to runtime network failures. This work proposes a probabilistic runtime verification approach that integrates mutable internal state, hybrid session mechanisms, and expected action ratios into an extended typestate model. The resulting framework enables dynamic modeling and monitoring of critical properties like concurrent message exchange and quorum satisfaction. Evaluated on commit and voting-based consensus protocols, the method effectively detects runtime behavioral deviations, significantly enhancing the expressiveness and practical applicability of typestate reasoning in distributed systems.

本文提出一种统一的消息模型，用于描述异构串行数据交换协议，并通过工业工具环境实现，支持自动化开发和标准化及弱形式化串行协议的工程应用。