X-OPM: Explainable Automatic Digital On-Chip Power Modeling for Enhanced Robustness
This study addresses the lack of physical interpretability and insufficient cross-workload generalization in existing on-chip power consumption models by proposing a robust feature engineering framework grounded in VLSI design principles. Methodologically, it introduces a human-in-the-loop workflow to balance modeling accuracy against overhead, integrating tree-based models to capture nonlinear interactions with linear models for prediction, while leveraging EDA tools for layout verification. Experimental results demonstrate that the proposed model achieves an R² exceeding 0.93 with an area overhead below 0.1%. It outperforms state-of-the-art methods such as APOLLO in predictive accuracy and maintains stable generalization performance under previously unseen workloads.