Carbon-Efficient 3D DNN Acceleration: Optimizing Performance and Sustainability

2025-04-14

AI Summary

To address the escalating carbon footprint of 3D-integrated DNN accelerators—driven by high manufacturing complexity—this work proposes a carbon-aware co-optimization framework targeting the Carbon Delay Product (CDP) as a unified objective. The method jointly minimizes carbon emissions and hardware overhead while preserving inference accuracy (loss <0.5%). Innovatively integrating approximate computing with a genetic algorithm, it enables process-node-agnostic design-space exploration. A full-stack carbon quantification model is developed, covering wafer fabrication, 3D stacking, and packaging stages. Experimental evaluation across 45 nm, 14 nm, and 7 nm technology nodes demonstrates that, relative to baseline designs, the optimized accelerator reduces MAC unit area by 22% and achieves up to 30% reduction in embodied carbon emissions.

Technology Category

• Machine Learning: Hardware-aware ML
• Constraint Satisfaction and Optimization: Distributed CSP/Optimization
• Search and Optimization: Combinatorial Optimization

Application Category

• Systems and Infrastructure for Web, Mobile and WoT: Sustainability and carbon-aware systems for Web, mobile, and WoT
• Graph Algorithms and Modeling for the Web: Graph neural networks and deep learning approaches for Web-related graphs
• Responsible Web: Sustainability and climate impact of web technologies

Abstract

As Deep Neural Networks (DNNs) continue to drive advancements in artificial intelligence, the design of hardware accelerators faces growing concerns over embodied carbon footprint due to complex fabrication processes. 3D integration improves performance but introduces sustainability challenges, making carbon-aware optimization essential. In this work, we propose a carbon-efficient design methodology for 3D DNN accelerators, leveraging approximate computing and genetic algorithm-based design space exploration to optimize Carbon Delay Product (CDP). By integrating area-efficient approximate multipliers into Multiply-Accumulate (MAC) units, our approach effectively reduces silicon area and fabrication overhead while maintaining high computational accuracy. Experimental evaluations across three technology nodes (45nm, 14nm, and 7nm) show that our method reduces embodied carbon by up to 30% with negligible accuracy drop.

Problem

• Optimizing 3D DNN accelerators for carbon efficiency
• Reducing embodied carbon footprint in hardware fabrication
• Balancing performance and sustainability in DNN acceleration

Innovation

• Carbon-efficient 3D DNN accelerator design
• Approximate computing in MAC units
• Genetic algorithm optimizes Carbon Delay Product