Network-Integrated Decoding System for Real-Time Quantum Error Correction with Lattice Surgery

2025-04-16

AI Summary

Current real-time surface-code decoders support only isolated logical qubits, precluding multi-qubit lattice surgery operations. This work presents the first real-time decoding system designed for kilo-qubit-scale logical arrays and natively supporting lattice surgery. We introduce a novel networked ensemble architecture combining tree- and grid-based computation, accelerated on FPGA (Xilinx VMK180), and integrate protocol-aware decoding algorithms, phenomenological noise modeling, and topology-customized scheduling. This design achieves zero throughput degradation and logarithmic latency scaling—O(log l)—with logical array size. Our prototype, DECONET/HELIOS, deployed across five FPGAs, decodes 100 distance-5 logical qubits in real time: at 0.1% physical error rate, it attains mean latency of 2.40 μs and inverse throughput of 0.84 μs per measurement round. It breaks the single-qubit isolation barrier and demonstrates, for the first time, backlog-free real-time quantum error correction under large-scale logical operations.

Technology Category

Machine Learning: Quantum Machine LearningCognitive Modeling & Cognitive Systems: Neural Spike CodingPlanning, Routing, and Scheduling: Optimization of Spatio-temporal Systems

Application Category

Economics, Online Markets and Human Computation: Incentives in network design for Web infrastructures and ecosystemsSystems and Infrastructure for Web, Mobile and WoT: Experiences and lessons learnt from Web-based algorithms and system deploymentsSearch and Retrieval-Augmented AI: Web learning to rank, online learning, and counterfactual learning for ranking

Abstract

Existing real-time decoders for surface codes are limited to isolated logical qubits and do not support logical operations involving multiple logical qubits. We present DECONET, a first-of-its-kind decoding system that scales to thousands of logical qubits and supports logical operations implemented through lattice surgery. DECONET organizes compute resources in a network-integrated hybrid tree-grid structure, which results in minimal latency increase and no throughput degradation as the system grows. Specifically, DECONET can be scaled to any arbitrary number of $l$ logical qubits by increasing the compute resources by $O(l imes log(l))$, which provides the required $O(l)$ growth in I/O resources while incurring only an $O(log(l))$ increase in latency-a modest growth that is sufficient for thousands of logical qubits. Moreover, we analytically show that the scaling approach preserves throughput, keeping DECONET backlog-free for any number of logical qubits. We report an exploratory prototype of DECONET, called DECONET/HELIOS, built with five VMK-180 FPGAs, that successfully decodes 100 logical qubits of distance five. For 100 logical qubits, under a phenomenological noise rate of 0.1%, the DECONET/HELIOS has an average latency of 2.40 {mu}s and an inverse throughput of 0.84 {mu}s per measurement round.

Problem

• Scaling quantum error correction to thousands of logical qubits
• Supporting logical operations via lattice surgery in real-time
• Minimizing latency and throughput degradation in large-scale systems

Innovation

• Network-integrated hybrid tree-grid structure
• Scalable to thousands of logical qubits
• Minimal latency increase with O(l log(l)) scaling