RAFT: A Stateful Retrieval-Augmented Framework for Troubleshooting Agents

📅 2026-09-17
📈 Citations: 0
✨ Influential: 0
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🤖 AI Summary
RAFT通过将历史案例抽象为时间线条目链并在此级别检索,解决了现有系统忽视案例多阶段状态性的问题,改进了故障排查代理的效果。
📝 Abstract
Effective troubleshooting agents in enterprise customer support depend on retrieving actionable guidance from similar historical cases, yet existing retrieval-augmented generation (RAG) systems treat support cases as static documents and overlook their multi-stage, stateful nature. We introduce RAFT (Retrieval-Augmented Framework for Troubleshooting Agents), a stateful RAG framework that abstracts each closed historical case into a directed chain of timeline entries and retrieves at the entry level, surfacing cases whose intermediate states match the active case and returning the parent-case trajectory anchored at the matched state; an optional case-level graph links cases through a configurable similarity representation. We evaluate this retrieval layer directly, which, unlike evaluating a full agent system, requires no production deployment. Because public multi-stage troubleshooting data is extremely rare, we pair a synthetic benchmark built from Microsoft Learn Windows Server documentation with real Apache Jira issues carrying human-created duplicate labels. RAFT improves Case Hit over vanilla RAG and GraphRAG baselines at every stage of case progress, with statistically significant gains over the strongest baseline; the Jira results provide directional evidence that the advantage transfers to real case histories. We release our benchmark, implementation, and the Apache Jira evaluation set.
Problem

Research questions and friction points this paper is trying to address.

Retrieval-Augmented Generation
Stateful Nature
Troubleshooting Agents
Historical Cases
Customer Support
Innovation

Methods, ideas, or system contributions that make the work stand out.

stateful RAG
timeline entries
multi-stage troubleshooting
case-level graph
retrieval-augmented framework
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Mingxuan Zhang
Microsoft, Redmond, WA, USA
Xiaowen Wang
Xiaowen Wang
Vanderbilt University, Silicon Labs
Circuit DesignsFault ToleranceBetter-Than-Worst-Case DesignTiming Analysis
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Anupma Sharan
Microsoft, Redmond, WA, USA
Z
Zhengyi Chen
Microsoft, Redmond, WA, USA
C
Chenyu Diana Zhang
Microsoft, Redmond, WA, USA
S
Shanshan Yang
Microsoft, Redmond, WA, USA
C
Chittibabu Pacharu
Microsoft, Redmond, WA, USA