LSQCA: Resource-Efficient Load/Store Architecture for Limited-Scale Fault-Tolerant Quantum Computing

2024-12-29

AI Summary

Fault-tolerant quantum computers face severe qubit resource constraints and low storage utilization—conventional architectures achieve only ~50% logical qubit density. Method: This paper proposes the Load/Store-based Fault-Tolerant Quantum Computing Architecture (LSQCA), which innovatively decouples the computation register (CR) from a scan-access memory (SAM), introducing two SAM implementations—point-SAM and line-SAM—and integrating memory access locality analysis with a variable-latency memory access mechanism to hide memory latency. LSQCA employs co-design of quantum architecture, static program analysis, and floorplan optimization. Contribution/Results: Under resource-constrained conditions, LSQCA achieves 90% logical qubit storage density—a near-doubling over prior approaches—with only a 5% increase in execution time, while maintaining full compatibility with mainstream quantum algorithms. Its core contribution is the first high-density, low-overhead fault-tolerant quantum storage abstraction, significantly alleviating the qubit resource bottleneck.

Technology Category

• Machine Learning: Quantum Machine Learning
• Search and Optimization: Learning to Search
• Constraint Satisfaction and Optimization: Satisfiability

Application Category

• Security and Privacy: Large-scale security measurements
• Search and Retrieval-Augmented AI: Web evaluation methodologies and metrics
• Graph Algorithms and Modeling for the Web: Querying, indexing, and retrieval in Web-related graphs

Abstract

Current fault-tolerant quantum computer (FTQC) architectures utilize several encoding techniques to enable reliable logical operations with restricted qubit connectivity. However, such logical operations demand additional memory overhead to ensure fault tolerance. Since the main obstacle to practical quantum computing is the limited qubit count, our primary mission is to design floorplans that can reduce memory overhead without compromising computational capability. Despite extensive efforts to explore FTQC architectures, even the current state-of-the-art floorplan strategy devotes 50% of memory space to this overhead, not to data storage, to ensure unit-time random access to all logical qubits. In this paper, we propose an FTQC architecture based on a novel floorplan strategy, Load/Store Quantum Computer Architecture (LSQCA), which can achieve almost 100% memory density. The idea behind our architecture is to separate all memory regions into small computational space called Computational Registers (CR) and space-efficient memory space called Scan-Access Memory (SAM). We define an instruction set for these abstract structures and provide concrete designs named point-SAM and line-SAM architectures. With this design, we can improve the memory density by allowing variable-latency memory access while concealing the latency with other bottlenecks. We also propose optimization techniques to exploit properties of quantum programs observed in our static analysis, such as access locality in memory reference timestamps. Our numerical results indicate that LSQCA successfully leverages this idea. In a resource-restricted situation, a specific benchmark shows that we can achieve about 90% memory density with 5% increase in the execution time compared to a conventional floorplan, which achieves at most 50% memory density for unit-time random access. Our design ensures broad quantum applicability.

Problem

• Quantum Computing
• Fault-Tolerance
• Resource Efficiency

Innovation

• LSQCA
• Resource Optimization
• Fault-Tolerant Quantum Computing