Scholar
Teruo Tanimoto
Google Scholar ID: Os2xvAEAAAAJ
Faculty of Information Science and Electrical Engineering, Kyushu University, Japan
Citations & Impact
Citations
284
H-index
8
i10-index
7
Publications
20
Co-authors
21
list available
Contact
Publications
Resume (English only)
Academic Achievements
- Takumi Kobori, Yasunari Suzuki, Yosuke Ueno, Teruo Tanimoto, Synge Todo, and Yuuki Tokunaga. LSQCA: Resource-Efficient Load/Store Architecture for Limited-Scale Fault-Tolerant Quantum Computing. In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA-31), pp. 304-320, Mar. 2024.
- Yasunari Suzuki, Takanori Sugiyama, Tomochika Arai, Wang Liao, Koji Inoue, and Teruo Tanimoto. Q3DE: A fault-tolerant quantum computer architecture for multi-bit burst errors by cosmic rays. In Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture (MICRO-55), pp. 1110-1125, Oct. 2022.
- Ilkwon Byun, Junpyo Kim, Dongmoon Min, Ikki Nagaoka, Kosuke Fukumitsu, Iori Ishikawa, Teruo Tanimoto, Masamitsu Tanaka, Koji Inoue, and Jangwoo Kim. XQsim: Modeling Cross-Technology Control Processors for 10+K Qubit Quantum Computers. In Proceedings of ACM/IEEE International Symposium on Computer Architecture (ISCA ‘22), pp. 366-382, June 2022.
- Koki Ishida, Il-Kwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, and Koji Inoue. SuperNPU: Architecting an Extremely Fast Neural Processing Unit Using Superconducting Logic Devices. In MICRO-53, Oct. 2020.
- Koki Ishida, Masamitsu Tanaka, Ikki Nagaoka, Takatsugu Ono, Satoshi Kawakami, Teruo Tanimoto, Akira Fujimaki, and Koji Inoue. “32 GHz 6.5 mW Gate-Level-Pipelined 4-bit Processor using Superconductor Single-Flux-Quantum Logic.” In VLSI 2020, June 2020.
Research Experience
- Published papers in multiple international conferences such as HPCA-31, MICRO-55, ISCA ‘22, etc.
Background
- Associate Professor at Faculty of Information Science and Electrical Engineering, Kyushu University. Research interests include computer architecture, quantum computer system architecture, hardware/software co-design, parallel processing, interconnects, operating systems, and dynamic programming languages.
Miscellany
- Email: tteruo[at]kyudai.jp, tteruo[at]ait.kyushu-u.ac.jp, tanimoto.teruo.547[at]m.kyushu-u.ac.jp, teruo.tanimoto[at]gmail.com
