Terracotta: Enabling the Adoption of New DRAM Techniques via a Flexible DRAM Interface and Memory Controller

2026-10-05

AI Summary

This study addresses the challenge of repeatedly modifying rigid interfaces and controllers when deploying emerging DRAM technologies by proposing a flexible integration framework based on DDR5. The proposed approach exploits command similarities to construct reusable technology primitives, which are combined with custom command extensions and a programmable memory controller. This design enables rapid deployment of new technologies without hardware modifications and supports synergistic combinations of multiple technologies. Experimental results demonstrate that the framework preserves over 96% of the performance benefits while incurring minimal energy and area overheads. By significantly reducing system integration costs, this work validates the advantages of multi-technology fusion for next-generation memory systems.

Abstract

DRAM continues to limit the performance, energy efficiency, and robustness of modern systems. Many prior works propose DRAM techniques that support in-DRAM computation, improve memory access latency and parallelism, and enhance DRAM maintenance and reliability. However, adopting each new technique requires repeated modifications to the rigid DRAM interface and memory controller, hindering its deployment. Our goal is to reduce these repeated modifications. We observe that the DRAM commands and memory controller structures of many DRAM techniques are similar. Our key idea is to use these similarities to compose a set of primitives for implementing diverse DRAM techniques. We propose Terracotta, a new framework with two flexible components: (i) custom command extensions that let DRAM vendors define new commands within a single, standardized interface, and (ii) a programmable memory controller that system designers can program to support new DRAM techniques post-silicon. Together, these enable deployment by configuring the memory controller instead of modifying the interface and controller. We design Terracotta for a DDR5-based system and evaluate its performance, energy, and hardware complexity. For four DRAM techniques from four distinct domains (processing-using-DRAM, low-cost DRAM maintenance, subarray-level parallelism, and latency reduction), Terracotta retains almost all of the performance benefits (>96%) of custom implementations. A Terracotta-based composition of two techniques outperforms the Terracotta-based implementation of each technique alone, demonstrating the benefits of adding techniques without repeated interface and controller modifications. Terracotta incurs low DRAM energy (0.6-3.2%), area (0.03%), and power (0.56%) overheads in a high-end server-grade processor. Terracotta's source code is freely available at https://github.com/CMU-SAFARI/Terracotta.

Problem

• DRAM interface
• memory controller
• technology adoption
• hardware flexibility

Innovation

• Flexible DRAM Interface
• Programmable Memory Controller
• Command Extensions
• Hardware Primitives
• DDR5