🤖 AI Summary
This study addresses the lack of efficient, automated methods for analyzing GDSII layouts of analog circuits by proposing a lightweight architecture that synergizes large language models (LLMs) with convolutional neural networks (CNNs). The proposed approach leverages fine-tuned LLMs to enable natural language interaction and integrates CNNs for visual feature extraction and GDSII parsing, thereby constructing an end-to-end analytical framework that supports conversational querying. Experimental results demonstrate that this system outperforms general-purpose vision-language models (VLMs) by 81% on analog circuit layout analysis tasks. Ultimately, this work provides an efficient, lightweight, and interactive solution for integrated circuit design verification.
📝 Abstract
The integration of artificial intelligence into computer-aided design frameworks has sparked a shift in the design of analog integrated circuits (ICs), transitioning the field from using manual and algorithmic-based solutions to adopting automated and intelligent paradigms. In this scenario, the GDSII file represents the industry-standard database containing the ultimate and most accurate source of information of the analog circuit, encapsulating the complex physical geometries and parasitic realities that define tape out performance. This paper proposes a novel framework that combines fine-tuned LLMs and CNNs to analyze GDSII files of analog circuits, enabling a conversational interface between the tool and the designers. Experimental results using thousands of analog designs across four realistic tasks demonstrate that the proposed solution outperforms state-of-the-art general-purpose massive VLMs by a significant margin (up to 81%), thus providing a lightweight solution to the problem of GDSII analysis.