Score
Designs and applies satisfiability modulo theories (SMT) encodings and decision procedures to verify properties of circuits or abstract computational models. Builds SMT formulas representing extracted circuits or system behaviors and uses solvers to exhaustively check equivalence, invariance, edge necessity, and robustness claims over specified domains.
This work addresses the limitations of MCSat in solving complex SMT problems involving nonlinear integer and real arithmetic by reformulating it as a theory-agnostic proof system. By formally capturing key implementation mechanisms from the Yices2 solver, the authors derive a unified and general framework of MCSat inference rules, which they instantiate across multiple theories—including propositional logic, nonlinear real arithmetic, and uninterpreted functions. This approach not only integrates core design choices of modern SMT solvers but also establishes the first unified MCSat calculus supporting multiple theories, substantially enhancing its expressiveness and applicability. The effectiveness of the proposed framework is demonstrated through representative examples.
研究通过SMT求解方法验证高风险ML系统的数据集质量,评估了数据属性类型、规范风格和编码策略对验证性能的影响。
This work addresses the low computational efficiency of stable model solving for Answer Set Programming Modulo Theories (ASPMT) under real-number constraints. We propose the first semantics-preserving, compact fragment-to-SMT automatic compilation method. Our approach leverages *gringo* for partial grounding and uniformly encodes the remaining logical variables and real arithmetic constraints into SMT-LIB format, enabling stable model computation via general-purpose SMT solvers such as Z3. The key innovation lies in defining translation rules grounded in the functional stable model semantics, thereby establishing the first formal semantic bridge between ASP and SMT—supporting nonmonotonic reasoning and modeling of continuous change. Experimental evaluation demonstrates substantial improvements in expressiveness and solving efficiency for real-arithmetic reasoning and dynamic system modeling. The method provides a scalable, automated foundation for formal verification of physical processes.
This work addresses the problem of computing the volume of the satisfiable region for linear real arithmetic (LRA) SMT formulas—a task critical to quantitative analysis in software verification, cyber-physical systems, and neural networks. Existing approaches suffer from low efficiency and poor scalability on complex formulas. To overcome these limitations, we propose the *ttc* algorithm: it decomposes the solution space via AllSAT-driven enumeration, represents the satisfiable set as a union of overlapping convex polyhedra, and introduces a streaming union operation to enable efficient, joint volume computation—marking the first method to achieve scalable volume estimation for general LRA SMT formulas. Evaluated on multiple benchmarks, *ttc* outperforms the state-of-the-art by over an order of magnitude in average runtime while significantly extending the quantitative reasoning capabilities of SMT solvers.
Complete truth assignment enumeration in Optimization Modulo Theories (OMT) excessively constrains the search space, degrading optimization efficiency. Method: We propose a novel OMT framework based on partial truth assignments, the first to demonstrate that partial assignments effectively mitigate over-constraining in OMT. We design OMT-specific partial assignment reduction techniques and integrate them into a CDCL-style SMT solver, supporting both the Linear Real Arithmetic (LRA) theory and customized extensions of the OPTIMATHSAT solver. Contribution/Results: Experimental evaluation on standard OMT(LRA) benchmarks shows significant improvements in solving speed and convergence to optimal solutions, validating both the effectiveness and efficiency of our approach.
This work presents the first systematic solution to the problems of model counting and sampling in the theory of bit-vectors. By leveraging bit-blasting to translate bit-vector formulas into conjunctive normal form (CNF), the approach integrates modern CNF counters and samplers to uniformly support a wide range of modes, including exact and approximate counting, projected and unprojected counting, as well as near-uniform and uniform sampling. The resulting tool, csb, addresses a critical gap in efficient counting and sampling for bit-vector constraints and demonstrates substantial performance advantages over existing methods in empirical evaluations, highlighting its practicality and effectiveness.
This work addresses the limitations of existing SMT solvers in deciding the satisfiability of linear integer arithmetic formulas involving universal quantifiers and uninterpreted function symbols, where reliance on explicit small models often leads to failure. The paper introduces a novel satisfiability proof method based on inductive reasoning, marking the first integration of induction into satisfiability certification for this class of formulas without constructing explicit models. By synergistically combining inductive inference, linear integer arithmetic, and SMT techniques, the approach substantially broadens the scope of tractable instances. It successfully verifies several satisfiable formulas that state-of-the-art SMT solvers cannot decide, thereby advancing the capability of automated reasoning for complex quantified logical formulas.
This work addresses the critical challenge of reliably integrating automated reasoning tools—such as theorem provers, SAT/SMT solvers, and termination analyzers—with proof assistants to build highly trustworthy systems. It presents a systematic survey and comparative analysis of two principal technical approaches: certification and formal verification. The study examines core methodologies including logical encoding, result replay and checking, and integration mechanisms within proof assistants. By elucidating the respective strengths and limitations of these methods and illustrating them through multiple successful case studies, the paper offers clear methodological guidance for constructing high-assurance automated reasoning systems, thereby substantially enhancing the verifiability and trustworthiness of their outputs.
This work addresses the inefficiency of directly handling quantified formulas in SMT solving and the absence of a general-purpose automated grounder supporting aggregation operations, which often compels users to resort to error-prone manual grounding. To overcome these limitations, the paper introduces relational algebra into the SMT grounding process for the first time, establishing a theoretical grounding framework that supports first-order logic with aggregation and enables finite equivalent transformations of certain quantified formulas over infinite domains. Building on an embedded SQLite engine for efficient relational algebra evaluation, the authors develop xmt-lib, an SMT-LIB-compliant grounder. Empirical evaluation on public benchmarks demonstrates that xmt-lib substantially enhances the performance of the Z3 solver, outperforming purely declarative approaches.
本文针对电路图示等价性问题,提出了三个难度递增的基准测试,并使用TPTP和SMT-LIB格式进行了一阶编码,生成了相应的测试实例。