deploy hardware-in-the-loop testbed

To address the challenges of experimentally validating satellite attitude control systems under realistic actuator conditions and the lack of health state estimation for actuators, this paper develops a reaction-wheel-based hardware-in-the-loop (HIL) real-time test platform. The platform integrates brushless motor electronic speed controllers, CAN bus communication, and an embedded computing unit, tightly coupling high-fidelity satellite dynamics simulation with synthetic sensor data generation. It enables closed-loop verification of adaptive control laws and online health state estimation of reaction wheels. A novel programmable fault injection mechanism is introduced to accurately emulate typical degradation modes—including torque nonlinearity and moment-of-inertia drift—facilitating quantitative robustness assessment of controllers. Experimental results demonstrate that the system maintains attitude stability under actual reaction wheel dynamics (steady-state error < 0.05°), while the health estimation algorithm achieves 92% accuracy in identifying critical parameter deviations. This work establishes a reusable, integrated experimental framework for co-verification of spacecraft actuators and controllers.

Current autonomous driving validation struggles to simultaneously achieve high test fidelity, low cost, and scalability; moreover, miniature hardware-in-the-loop (HIL) platforms lack a systematic framework for quantitative SOTIF-compliance assessment. This paper proposes a miniature mixed-reality HIL platform designed for auditable closed-loop evaluation, integrating high-precision motion capture, mixed-reality rendering, and synchronized timing control to establish a unified spatiotemporal measurement core and a three-stage SOTIF testing pipeline. The platform achieves a spatial root-mean-square error of 10.27 mm and maintains stable closed-loop latency at 45 ms. It is the first miniature HIL system to enable trigger-condition identification and quantitative characterization of performance boundaries. Empirical evaluation using Autoware demonstrates its capability to precisely localize critical performance cliffs induced by 40-ms injection delays, substantially enhancing the scientific rigor and assessment value of compact-scale validation platforms.

This work addresses the validation gap between simulation and real-world deployment of autonomous driving algorithms, particularly the lack of efficient, high-fidelity testing platforms for safety-critical scenarios. To bridge this gap, the authors propose a mixed-reality hardware-in-the-loop testing framework that seamlessly integrates physical mobile robots with high-fidelity virtual environments, enabling multimodal sensing, vehicle-to-everything (V2X) communication, and large-scale multi-agent collaboration. A key innovation is the coexistence of physical and virtual agents within a unified architecture, coupled with an online learning controller based on control barrier functions (CBFs) that establishes an integrated perception-planning-control safety assurance mechanism. Experimental results demonstrate that the platform significantly enhances the reliability and efficiency of sim-to-real transfer and validates its effectiveness across diverse safety-critical scenarios.

Existing SoC virtual platforms lack non-intrusive, runtime performance analysis tools for SystemC-TLM 2.0 simulations. Method: This paper proposes a lightweight, fully non-intrusive tracing framework that requires no source-code modification and does not rely on debug symbols. It integrates SystemC API hooking, dynamic binary instrumentation, and event-driven logging, ensuring cross-platform compatibility via standard APIs while supporting database persistence and visualization-enabled post-processing. Contribution/Results: We introduce the first fully non-intrusive TLM 2.0 tracing mechanism, enabling fine-grained, transaction-level behavioral capture without perturbing simulation logic. Experiments demonstrate complete tracing of the Linux boot process with an average runtime overhead below 3%, achieving high fidelity and practical usability. The framework significantly enhances performance analysis and debugging efficiency in hardware-software co-design workflows.

To address the challenges of heterogeneity, fragmented resources, and inefficient collaboration in embedded-system virtual-prototype simulation tools, this paper proposes SUNRISE—a scalable infrastructure for distributed simulation. SUNRISE introduces the Simulation Adapter Abstraction Layer (SAAL), a novel abstraction enabling plug-and-play integration of seven major commercial and open-source simulators. It leverages lightweight containerization (Docker/Kubernetes) and a RESTful microservice architecture to dynamically orchestrate simulation tasks across decentralized computing resources. An open API gateway is designed to facilitate cross-organizational collaboration. Experimental evaluation demonstrates that SUNRISE reduces simulation-task deployment latency by 62%, improves cross-organizational collaboration efficiency by 3×, and achieves a 99.8% API call success rate.

This work addresses the inefficiencies and semantic inconsistencies arising from separately implementing driver and monitor programs in traditional hardware module testing. To overcome this, the authors propose a domain-specific language (DSL) tailored to hardware communication protocols, which enables the unified specification of both driver and monitor logic through an imperative syntax, thereby ensuring their semantic consistency for the first time. Building upon this DSL, they develop a prototype tool that leverages waveform parsing and transaction-level trace inference techniques to accurately reconstruct protocol-compliant transaction sequences from raw signal waveforms. Experimental results demonstrate that the approach significantly improves development efficiency, with further validation planned on real-world interconnect protocols such as Wishbone and AXI-Stream.

This work addresses the lack of cost-effective, high-precision power measurement solutions for embedded systems, given the high expense and inflexibility of industrial semiconductor test equipment. The authors propose and implement a compact, open-source hardware and software-based system-level power profiling platform that integrates a Raspberry Pi controller, a high-accuracy current sensor, and a microcontroller-based device under test (DUT). A lightweight HTTP interface enables automated firmware deployment, synchronized execution, and remote control. By uniquely combining low-cost open-source hardware with an automated testing workflow, the platform achieves high-resolution current acquisition and supports energy-efficiency benchmarking and regression testing across multiple firmware variants. This significantly enhances the scalability, reproducibility, and practicality of power analysis for embedded systems, making it well-suited for research, prototyping, and educational applications.

This study addresses the gap between simulation-based research and real-world deployment in smart grid state estimation by presenting an experimental validation over a commercial 5G network. The authors develop a multi-node testbed integrating Raspberry Pi edge nodes with Typhoon hardware-in-the-loop (HIL) simulation, implementing end-to-end real-time state estimation and fault detection using an IEEE 4-bus feeder model, a phasor data concentrator (PDC), and key performance indicators (KPIs). Experimental results demonstrate that 5G achieves an average end-to-end latency approximately 6.5 times lower than LTE Cat-M, maintains high estimation accuracy under both steady-state and dynamic conditions, and enables fault detection with a latency as low as 0.80 seconds. This work provides the first empirical evidence of the real-time capability and reliability of smart grid state awareness in an operational 5G environment, effectively bridging the gap between simulation and practical implementation.

This study addresses the challenges in testing Internet of Things (IoT) software, particularly the complexity of external dependencies and insufficient test case effectiveness, which have lacked systematic empirical investigation. It presents the first large-scale analysis of testing practices in open-source IoT projects, integrating assessments of test effectiveness, categorization of testing challenges, and mining of mock usage patterns. The findings reveal that despite the substantial volume of tests, their effectiveness is generally limited, with managing external dependencies emerging as a central difficulty. Moreover, the judicious application of mock objects significantly enhances test coverage and quality. This work establishes the first empirical benchmark for IoT software testing and offers concrete directions for improving testing practices in this domain.

This study addresses the limitations of software-defined vehicles (SDVs) stemming from tight hardware-software coupling, which hinders modularity, interoperability, real-time performance, and over-the-air (OTA) update capabilities. The work presents the first systematic evaluation of hardware abstraction layer (HAL) mechanisms across automotive and non-automotive domains—including smartphones and industrial automation—and establishes a standardized assessment framework tailored to SDV requirements. Comparative analysis reveals that hypervisor-based HALs excel in security, OTA support, and hardware efficiency, whereas middleware-based HALs offer superior portability and modularity. Building on these insights, the paper proposes a hybrid HAL architecture that synergistically combines the strengths of both approaches, delivering a scalable, lifecycle-aware hardware abstraction solution for SDVs that ensures secure isolation while providing standardized interfaces.