quantum algorithm design

Quantum circuit fidelity is severely degraded by hardware noise, topology constraints, and compilation choices; yet the coupled impact of compiler strategies (qubit mapping, routing, optimization level) and hardware parameters (noise spectrum, connectivity, scale) remains poorly quantified. Method: We propose a noise-aware full-stack design space exploration (DSE) framework integrating Qiskit-based compilation modeling, hardware sensitivity analysis, fidelity prediction, and quantum error correction (QEC)-aware simulation. Contribution/Results: Our work is the first to quantitatively demonstrate that judicious selection of initial qubit layout and routing can suppress hardware errors more effectively than conventional error mitigation techniques. We further establish that hardware–software co-design remains critical even in QEC-enabled scenarios. Experiments across diverse noisy intermediate-scale quantum (NISQ) and prospective fault-tolerant architectures show an average 12.7% improvement in expected fidelity, alongside reductions in circuit depth and gate count. The framework delivers actionable mapping strategies and hardware configuration guidelines for both near-term noisy and future fault-tolerant quantum systems.

To address the high manual design overhead and low execution fidelity/efficiency in mapping quantum algorithms to hardware, this paper proposes a cross-layer (algorithm–compiler–hardware) co-optimization framework. Methodologically, it pioneers the integration of deep reinforcement learning with graph neural networks to jointly automate quantum architecture search, logic synthesis, gate-level optimization, qubit mapping, and SWAP-based routing; it further introduces a superconducting-qubit hardware-adaptive modeling mechanism. Key contributions include: (1) establishing an AI-driven, end-to-end compilation optimization paradigm; (2) significantly reducing human intervention while improving circuit depth compression and quantum gate fidelity; and (3) empirically validating the feasibility and superior performance of the AI-enhanced compiler on medium-scale real superconducting quantum processors.

To address the practical deployment challenges of quantum algorithms on Noisy Intermediate-Scale Quantum (NISQ) devices, this work proposes a full-stack execution framework encompassing compilation, optimization, and error mitigation. Methodologically, it introduces an Approximate Quantum Fourier Transform (AQFT) that preserves the quantum advantage of key algorithms—including Shor’s and HHL—while substantially reducing circuit depth and noise sensitivity. The framework integrates lightweight quantum circuit compilation, variational parameter optimization, zero-noise extrapolation, and machine learning–driven error modeling. Experimental evaluation on real quantum hardware demonstrates significant improvements in algorithmic fidelity and scalability. Moreover, the framework enables quantum-classical heterogeneous execution, effectively balancing hardware constraints with computational acceleration requirements. By unifying these techniques into a cohesive pipeline, it delivers a systematic solution toward realizing exponential quantum speedup in practice.

Quantum simulation on classical hardware faces severe computational and memory scalability bottlenecks, hindering faithful emulation beyond ~100 qubits. To address this, we systematically analyze the simulation stack and propose, for the first time, a “multi-level modeling + cross-stack optimization” co-design framework that enables approximate quantum simulation on heterogeneous accelerators (GPUs and FPGAs). Our methodology integrates tensor network compression, sparse state representations, low-rank approximations, mixed-precision arithmetic, and hardware-aware scheduling—rigorously characterizing complexity trade-offs and applicability domains of mainstream algorithms. Experimental evaluation demonstrates substantial improvements in simulation throughput and memory efficiency: up to 3.2× speedup and 4.7× memory reduction versus state-of-the-art baselines. This work delivers the first systematic acceleration guide and reusable engineering framework for classical simulation of >100-qubit quantum circuits.

Logical state preparation circuits for CSS codes in fault-tolerant quantum computing are traditionally hand-designed, lacking automated synthesis methods that jointly optimize circuit depth and gate count—especially beyond distance-3 codes. Method: This paper introduces the first SAT-based fully automated synthesis framework for CSS code logical state preparation. It supports arbitrary code distance (d) (removing the conventional (d=3) restriction), jointly optimizes both preparation and verification subcircuits for depth and gate count, and incorporates scalable heuristics and non-deterministic construction strategies. Results: Experiments on distance-3, -5, and -7 CSS codes demonstrate that synthesized circuits achieve provable optimality in both depth and gate count; moreover, logical error rates exhibit exponential suppression with increasing code distance. The framework is open-sourced and integrated into the MQT toolchain.

This work addresses the gap between idealized noise-free models and real-world noisy quantum hardware in quantum program verification. It introduces, for the first time, a noise-aware quantum Hoare logic that integrates hardware-specific error models—such as those provided by IBM Qiskit—to define a realistic noisy semantics. The study further demonstrates the critical role of classical probabilistic branching in achieving optimality in quantum programs. Building on this foundation, the authors develop a bounded verification algorithm and an automated synthesis method capable of generating optimal quantum subroutines tailored to specific noise environments, including tasks like parity computation, state preparation, and state discrimination. The efficacy of the proposed approach is validated against actual hardware specifications.

As quantum software grows increasingly complex, traditional quality assurance approaches relying on classical simulation have become infeasible to scale. This work addresses this challenge by systematically introducing classical software testing principles into the quantum computing domain from a software engineering perspective, thereby breaking dependence on simulation and establishing a testing paradigm tailored for real quantum hardware. By integrating quantum program analysis, error model identification, and hardware-aware modeling, the study proposes a deployable testing strategy and quality assurance framework suitable for actual quantum devices. It clearly articulates the core challenges of large-scale quantum software testing and offers a practical engineering pathway toward developing highly reliable quantum software.

This study addresses the critical lack of systematic investigation into faults in quantum simulators, which has left their reliability risks poorly understood. For the first time, we conduct an empirical analysis of 394 real-world defects across 12 widely used open-source quantum simulators. Through manual classification and root-cause tracing, we systematically characterize failure modes along multiple dimensions—including defect origins, manifestations, affected components, and detection mechanisms. Our findings reveal a prevalence of silent logical errors and critical failures stemming from classical infrastructure issues such as memory management and dependency compatibility, challenging the conventional testing paradigm that focuses narrowly on quantum-specific logic. Notably, most crashes and resource-related errors are reported post-deployment by users, whereas logical errors often produce incorrect outputs without triggering exceptions, offering crucial insights for advancing quantum software testing and verification methodologies.

This study addresses the lack of a unified evaluation framework for generative AI in quantum circuit and code generation, particularly the absence of validation on real quantum hardware. Through a structured scoping review, the authors systematically analyze 13 generative systems and five datasets, proposing the first taxonomy based on output modality and training paradigm. They further introduce a three-tiered evaluation framework encompassing syntactic validity, semantic correctness, and hardware executability. The findings reveal that while existing methods generally satisfy syntactic requirements and partially meet semantic criteria, none demonstrate end-to-end validation on actual quantum devices. This critical gap underscores the field’s current limitation in real-device verification and provides a clear direction for future research toward practical, hardware-aware quantum program synthesis.

This work addresses the lack of systematic experimental tracking in current quantum software development, which hinders effective monitoring of hardware noise, software evolution, and error sources. It introduces, for the first time, a holistic experimental tracking methodology tailored to quantum characteristics, proposing an end-to-end tracking framework that integrates error mitigation techniques with quantum reservoir computing. Validated through a chaotic time series prediction case study, the framework enables fully reproducible tracking of quantum experiments, accurately identifies critical error sources, and aggregates marginal gains across the workflow. The approach offers a generalizable methodological foundation for advancing quantum software engineering practices.