quantum circuit encoding

This work addresses the latency, noise, and performance overhead introduced by classical control in dynamic quantum circuits. It proposes a compile-time optimization framework that, for the first time, integrates classical-quantum joint symbolic execution with an extended probabilistic circuit model. By statically analyzing and jointly propagating classical control information alongside quantum states, the framework constructs an intermediate representation capable of handling probabilistic control flow, thereby reducing or even eliminating mid-circuit measurements and classical feedforward operations. The approach is compatible with modern quantum programming languages and, on randomly generated dynamic circuits, achieves an average reduction of approximately 50% in classical feedforward steps, with substantially greater improvements observed in favorable scenarios.

Conventional quantum circuit design research over-abstracts implementation constraints, erroneously assuming exclusive reliance on purely digital VLSI methodologies—limiting practical deployment, especially for financial applications such as quantum-accelerated option pricing. Method: This work proposes a mixed-signal quantum circuit framework that synergistically integrates the compactness of analog circuits with the synthesis-friendly nature of digital circuits. It pioneers the integration of industrial-grade VLSI tools—including Synopsys Design Compiler—into quantum circuit synthesis, supported by three novel techniques: quantum-classical co-synthesis, noise-resilient gate mapping, and latency-aware scheduling. Contribution/Results: Evaluated on a 12-qubit option pricing benchmark, the approach reduces gate count from 4,095 to 392, compresses circuit depth from 2,048 to 6, and lowers logical error rate from 25.86% to 1.64%. These results demonstrate that mature VLSI methodologies significantly enhance quantum circuit practicality, scalability, and robustness.

To address the prohibitively high classical compilation and control overhead in quantum dynamical simulation, this work proposes a hardware-assisted Parameterized Circuit Execution (PCE) framework. It is the first to jointly leverage structural equivalence analysis and PCE for the efficient realization of constant-depth time-evolution circuits—specifically those constructed via Cartan decomposition. The method drastically reduces classical processing latency, particularly for many-body models such as the transverse-field XY and Heisenberg spin chains. Experimental results demonstrate up to a 50% reduction in end-to-end runtime. Crucially, this work extends the applicability of PCE beyond its prior restriction to Quantum Characterization, Verification, and Validation (QCVV), establishing a new paradigm for efficient dynamical simulation on near-term Noisy Intermediate-Scale Quantum (NISQ) devices.

This work proposes the IncrementalExecution framework to dynamically determine the optimal termination point for measurement shots in static quantum circuits under black-box conditions—where no structural assumptions are made and the noise model is unknown. The framework halts execution when additional shots no longer significantly alter the empirical output distribution, thereby balancing computational cost and fidelity according to the principle of diminishing returns. Requiring no prior knowledge of the algorithm, and eschewing variational or adaptive circuit structures, it is universally applicable to any static quantum circuit and readily deployable on existing quantum cloud platforms. Its efficacy is demonstrated across 180 circuit-backend combinations and 7.3 million experimental runs, where it consistently outperforms existing methods that rely on problem-specific assumptions.

This work addresses the joint compilation problem of qubit mapping and SWAP routing for surface-code-based fault-tolerant quantum computers. Recognizing that conventional decoupled optimization leads to suboptimal solutions, we propose a unified discrete optimization framework grounded in the operation dependency graph: both qubit mapping and SWAP insertion are jointly modeled as a coupling-constrained integer program. We further design a dependency-aware simulated annealing algorithm to achieve cooperative near-optimal compilation. Crucially, our approach is the first to explicitly incorporate fine-grained, operation-level data dependencies into the compilation optimization model, thereby significantly improving compilation quality and hardware adaptability. Evaluated on realistic quantum workloads—including QAOA and Shor’s algorithm subcircuits—our method reduces logical gate overhead by 32% on average and improves circuit fidelity by 27% compared to state-of-the-art compilers, while maintaining scalability.

This work addresses the gap between idealized noise-free models and real-world noisy quantum hardware in quantum program verification. It introduces, for the first time, a noise-aware quantum Hoare logic that integrates hardware-specific error models—such as those provided by IBM Qiskit—to define a realistic noisy semantics. The study further demonstrates the critical role of classical probabilistic branching in achieving optimality in quantum programs. Building on this foundation, the authors develop a bounded verification algorithm and an automated synthesis method capable of generating optimal quantum subroutines tailored to specific noise environments, including tasks like parity computation, state preparation, and state discrimination. The efficacy of the proposed approach is validated against actual hardware specifications.

This work addresses the limitations of current general-purpose quantum circuit generation methods, which rely excessively on scaling model size and consequently produce outputs that frequently violate quantum-physical semantic constraints. As a result, the fraction of valid circuits decays exponentially with qubit count, rendering post-hoc filtering infeasible. To overcome this, the authors propose a verifier-centric generative architecture that embeds task-specific quantum information rules directly into the synthesis process. By integrating hierarchical constraints, topological masking, and symbolic proxies, the approach proactively guides generation to guarantee both mathematical correctness and physical validity of the output circuits. This paradigm transcends the confines of conventional imitation learning, demonstrating that merely enlarging model capacity cannot bridge the syntax–semantics gap, and establishes a novel, modular, and scalable framework for quantum program synthesis.

Existing quantum circuit compilation techniques are largely confined to unitary circuits without measurements, making them ill-suited for optimizing dynamic quantum circuits that involve mid-circuit measurements and classical feedback. This work proposes Branch-aware Quantum Constant Propagation (BQCP), the first approach to incorporate path-sensitive analysis into the optimization of dynamic quantum circuits. By jointly modeling classical control flow and quantum state evolution, BQCP tracks classical information generated by measurements and the corresponding quantum states within each conditional branch at compile time, enabling semantics-preserving, path-sensitive simplifications. The method combines bounded quantum state representations with branch pruning strategies to achieve both scalability and correctness. Experimental results demonstrate that BQCP significantly reduces circuit size compared to existing techniques—including standard Quantum Constant Propagation—on both real-world and synthetic dynamic circuit benchmarks.