layout optimization

This work addresses the challenge of macro placement in chip physical design, which requires balancing wirelength and spatial constraints—a problem poorly handled by conventional methods. The authors propose a novel approach that leverages an off-the-shelf, unfinetuned vision-language model (VLM) to guide a baseline placer by exploiting its inherent spatial reasoning capabilities for macro placement within subregions. This is combined with evolutionary search to iteratively refine the layout. The framework is highly generalizable and seamlessly integrates with both learning-based and analytical placers, such as DREAMPlace. Evaluated on ten open-source benchmarks, the method outperforms the current best learning-based approaches on nine, reducing wirelength by up to 32%. Furthermore, it consistently enhances DREAMPlace across all eight tested cases, achieving performance gains of up to 4.3%.

This paper addresses the two-dimensional hierarchical rectangular packing problem, where the container size is unspecified and items may be either basic rectangles or nested sub-blocks—whose dimensions are determined by lower-level packing optimizations—arising in applications such as VLSI floorplanning, facility layout, and logistics. To overcome the low accuracy and poor scalability of conventional bottom-up approaches, we propose a multi-level logic-based Benders decomposition method that dynamically refines sub-block dimensional constraints without requiring manual enumeration of aspect-ratio candidates. We introduce the first tight integration of recursive structural modeling with Benders decomposition to enable end-to-end joint optimization. On synthetic instances with up to seven hierarchy levels and 80 items per level, our method significantly improves solution quality and scalability over monolithic MILP formulations and bottom-up baselines, while ensuring stable convergence within practical time limits.

This work addresses the challenge of minimizing wirelength while resolving module overlaps in VLSI floorplanning by proposing a three-stage fixed-outline placement framework that synergistically integrates non-convex and convex optimization techniques. The approach begins with a quadratic placement to generate a topology-aware initial solution, followed by a joint optimization of wirelength and overlap using an Adam-based projected gradient method. Finally, legalization is efficiently achieved through a logarithmic barrier convex model derived from horizontal and vertical constraint graphs. This framework represents the first unified placement flow that cohesively combines non-convex and convex optimization within a single pipeline, significantly enhancing wirelength quality. Experimental results on MCNC, GSRC, and HB+ benchmarks demonstrate state-of-the-art performance, with average HPWL improvements of at least 1% and 5% over existing methods.

Existing automatic floorplan generation methods typically operate in raster space and rely on post-hoc vectorization, leading to structural inconsistencies and hindering end-to-end training. This work proposes the first end-to-end vector-based floorplan generation model, which employs a two-level VQ-VAE to construct a hierarchical codebook that separately captures global layout and local geometry. A unified CodeTree representation encodes both room bounding boxes and polygon-level semantics. Leveraging an autoregressive Transformer, the model directly generates diverse, topologically valid designs from boundary inputs without requiring explicit topological or dimensional priors, aligning closely with human design workflows. It achieves state-of-the-art performance on both the RPLAN (FID=1.84, MSE=2.06) and LIFULL datasets, significantly improving generation quality and practical utility.

The two-dimensional irregular strip packing problem suffers from stagnant research progress, poor reproducibility, and underestimated optimization potential. To address these challenges, this paper introduces Sparrow, an open-source heuristic solver. Its core innovation is the “sequential feasibility decomposition” framework, which hierarchically decomposes the global optimization problem into a series of collision-free feasibility subproblems, integrating efficient collision detection, geometric processing, and heuristic search strategies. We release ten real-world industrial benchmark instances and fully open-source the implementation. Experimental results demonstrate that Sparrow significantly outperforms state-of-the-art methods across multiple benchmarks, achieving simultaneous improvements in nesting quality and computational efficiency. By establishing a transparent, reproducible, and extensible foundation, Sparrow breaks longstanding technical barriers and fosters sustainable academic advancement in irregular packing research.

This work addresses the challenge that existing large language models struggle to simultaneously satisfy stringent geometric, routing, and electrical connectivity constraints in dense PCB layout design. To bridge this gap, we introduce OmniLayout, the first multimodal benchmark specifically tailored for PCB layout, which jointly models schematic diagrams and physical layouts. The benchmark encompasses four constraint-aware reasoning tasks designed to systematically evaluate model capabilities in geometric reasoning, routability, preservation of electrical functionality, and tool invocation. Integrating industrial-scale layout data, geometric constraint modeling, routing analysis, and circuit verification, our framework exposes critical limitations of current models—particularly their weak geometric reasoning, poor routing optimization, and insufficient functional consistency—thereby filling a crucial void in evaluating multimodal collaborative reasoning within electronic design automation.

This work addresses the challenging problem of spatial packaging layout and routing in three-dimensional interconnected systems with physical interactions by proposing a hybrid optimization framework. The approach employs geometric abstraction based on Maximum Disjoint Ball Decomposition (MDBD) and integrates stochastic initialization, gradient-based refinement, and an interior-point method to effectively tackle the nonlinear, non-convex, and continuous spatially coupled design problem. A newly introduced benchmark enables verifiable performance evaluation, demonstrating that the proposed method outperforms existing techniques by over 10% across multiple scenarios. The solutions achieve a relative error of only 0.6–2% compared to ground-truth values, significantly enhancing both convergence stability and solution optimality.

This work addresses the systematic spatial reasoning errors exhibited by large language models when generating 3D structures from natural language instructions, which often manifest as coordinate inaccuracies that undermine structural reliability. To mitigate this, the authors propose a neuro-symbolic 2.5-D decomposition approach that disentangles deterministic physical constraints—such as gravity—from the language model’s output. The model is restricted to planning layouts in a 2D plane, while a symbolic executor determines vertical stacking based on column occupancy. This strategy significantly improves construction accuracy, achieving a 94.6% average structural correctness on the Build What I Mean benchmark—surpassing GPT-4o (90.3%) and the previous state-of-the-art system (76.3%). Notably, it retains 94.5% performance on Jetson Thor AGX edge hardware. Ablation studies attribute a 50.7-percentage-point accuracy gain to the proposed method, highlighting its potential for generalization to other physically constrained assembly tasks.

This study addresses the limitations of traditional Design Structure Matrix (DSM) modularization approaches, which rely solely on graph-based optimization and lack engineering semantic context, often failing to align with practical design requirements. The authors propose a novel DSM modularization paradigm integrating large language models (LLMs), leveraging prompt engineering and iterative refinement to embed system-level semantic information directly into the partitioning process—achieving high-quality results without custom optimization code. Central to this work is the "semantic alignment hypothesis," which elucidates how improper incorporation of domain knowledge can degrade performance. Through systematic experiments across five representative engineering cases using three mainstream LLMs, the method demonstrates convergence to reference-quality modularization within 30 iterations, offering a reproducible and practical pathway for LLM-driven engineering design optimization.

This work proposes an end-to-end approach based on Satisfiability Modulo Theories (SMT) for automatically generating maze paths from arbitrary input patterns—such as text or shapes—that satisfy prescribed topological constraints, with support for both two-dimensional and three-dimensional physical realizations. The method formalizes path synthesis as a global constraint satisfaction problem encompassing adjacency, continuity, and pattern coverage, enabling the generation of self-avoiding planar paths or layered paths with specified over-and-under crossings through a single SMT solving step. To the best of our knowledge, this is the first application of SMT-based formal methods to pattern-driven maze generation, unifying path synthesis and 2D/3D geometric construction. The framework successfully translates textual or graphical inputs into fabricable maze structures, validated through a complete pipeline and demonstrated via representative examples.